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2.3 ADC Input Drive Amplifiers

The circuit shown in 

Figure 2-2

 is the fully differential amplifier (THS4551) used to drive the ADC. The input

applied to J3 and J6 must be a low-distortion differential signal. The common-mode output for the amplifier
is controlled by pin 2 on U5 (VOCM). The common-mode signal is set by the data converter (pin 6, VCM).
The output of the amplifier connects to an RC filter that connects to the ADC input (R37, R43, C30, C26, and
C32). The amplified configuration has several do not populate (DNP) components. These components provide
flexibility, but are not required for good performance. The amplifier power supplies are connected by default to
the AVDD and AVSS supplies that are also used for the ADC. The amplifier supplies can be changed to external
supplies VP and VM by removing the 0-Ω resistors that connect to AVDD and AVSS (0R31 and 0R47), and
installing them to connect VP and VM (0R32 and 0R48).

AINN

AINP

0R33

0R44

1µF  
16V  

C31  

1.00k  

R38  

VCM  

GND  

GND  

1  

2  

3  

J4

TSW-103-07-G-S

GND  

Place Capacitors near ADC inputs

INPUT AMPLIFIER  

10.0

R37  

10.0

R43  

0.1%

1.00k  

R27  

0.1%

1.00k  

R26  

0.1%

1.00k  

R53  

0.1%

1.00k  

R54  

10.0

R22  

DNP  

10.0

R57  

DNP  

C0G/NP0  

0.01µF

C28  

DNP  

1  

2  

3  

4  

5  

J3

142-0701-801

1  

2  

3  

4  

5  

J6

142-0701-801

7  

1  

8  

5  

VOCM

2  

4  

V+

V-

3  

6  

THS4551IDGKR

U5

15.0

R39  

15.0

R40  

AVSS

AVSS

C0G/NP0  

0.01µF

C30  

AINP

AINN

0R17

0R67

VPAMP  

VMAMP  

0R28

DNP  

0R50

DNP  

C0G/NP0  

390pF  

C20  

DNP  

C0G/NP0  

390pF  

C36  

DNP  

C0G/NP0  

1000pF

C29  

DNP  

C0G/NP0  

470pF  

C18  

DNP  

427Ohm for Filter  

427Ohm for Filter  

1%

C0G/NP0  

1000pF

C26  

1%

C0G/NP0  

1000pF

C32  

10µF

C34  

10µF

C23  

VM

0R48

DNP  

0R47

AVSS

VP

0R31

0R32

DNP  

AVDD1  

AVSS

AVSS

AVSS

AVSS

100nF  

C22  

100nF  

C33  

VPAMP  

VMAMP  

Figure 2-2. ADC Drive Amplifier

EVM Analog Interface

www.ti.com

6

ADS127L11EVM-PDK Evaluation Module

SBAU351 – APRIL 2021

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Copyright © 2021 Texas Instruments Incorporated

Содержание ADS127L11EVM

Страница 1: ...d a bill of materials Throughout this document the abbreviation EVM and the term evaluation module are synonymous with the ADS127L11EVM Table of Contents 1 EVM Overview 3 1 1 ADS127L11EVM Kit 3 1 2 AD...

Страница 2: ...ematics and Layout 21 7 1 Bill of Materials 21 7 2 Board Layouts 25 7 3 Schematics 26 8 References 29 Trademarks Microsoft and Windows are registered trademarks of Microsoft Corporation All trademarks...

Страница 3: ...1 1 ADS127L11EVM Kit The ADS127L11 evaluation module kit includes the following features Hardware and software required for diagnostic testing as well as accurate performance evaluation of the ADS127L...

Страница 4: ...11EVM PDK GUI Unsupported Features The following features of the ADS127L11 device are currently not supported in the ADS127L11EVM GUI but will be on a future version of the software To ensure proper o...

Страница 5: ...igure 2 1 shows all connections to the ADS127L11 data converter U3 Each power supply connection has a 1 F and 100 nF decoupling capacitor Make sure these capacitors are physically close to the device...

Страница 6: ...hat connect to AVDD and AVSS 0R31 and 0R47 and installing them to connect VP and VM 0R32 and 0R48 AINN AINP 0R33 0R44 1 F 16V C31 1 00k R38 VCM GND GND 1 2 3 J4 TSW 103 07 G S GND Place Capacitors nea...

Страница 7: ...eference Figure 2 4 shows the REF6225 configuration This reference includes an integrated wide bandwidth buffer that makes the REF6225 ideal for driving the switched capacitor input to the ADS127L11 T...

Страница 8: ...DNP REFP 1 00k R46 0R56 DNP REFN GND 1 00k R36 1 00k R58 EXTERNAL REFERENCE 1 2 3 4 5 OPA192IDBVR U6 1 2 3 4 5 OPA192IDBVR U4 VP 0R52 DNP VM 0R60 DNP VP 0R30 DNP VM 0R42 DNP 0R29 AVDD1 AVSS 0R41 0R51...

Страница 9: ...ock source 25 MHz Y1 oscillator or SMA connector J14 If the local 25 MHz oscillator Y1 is used then remove the shunt on jumper JP3 to enable the oscillator If an external clock source is used use a CM...

Страница 10: ...9 59 2 2 4 4 6 6 8 8 10 10 12 12 14 14 16 16 18 18 20 20 22 22 24 24 26 26 28 28 30 30 32 32 34 34 36 36 38 38 40 40 42 42 44 44 46 46 48 48 50 50 52 52 54 54 56 56 58 58 60 60 GND MP1 GND MP2 GND MP3...

Страница 11: ...To use the external power connections for AVDD and IOVDD change the 0 resistor connections R71 R74 and R81 Connector J12 can optionally be used to supply power to the onboard 5 V and 2 5 V regulators...

Страница 12: ...shunt on JP5 to position 2 3 TP17 GND TP18 GND GND 100k R68 5 2V Analog LDO EVM_REG_5V5 OUT 1 NC 2 SENSE 3 6P4V2 4 6P4V1 5 3P2V 6 GND 7 1P6V 8 0P8V 9 0P4V 10 0P2V 11 0P1V 12 EN 13 NR 14 IN 15 IN 16 NC...

Страница 13: ...message may appear or the installer exe file may be deleted As shown in Figure 5 1 accept the license agreements and follow the on screen instructions to complete the installation Figure 5 1 Software...

Страница 14: ...n of this software as shown in Figure 5 3 if not already installed Figure 5 3 LabVIEW Run Time Engine Installation ADS127L11EVM Software Installation www ti com 14 ADS127L11EVM PDK Evaluation Module S...

Страница 15: ...I This loading takes a few seconds then the AVDD and DVDD power supplies will turn on 4 Connect the signal generator The input range is 0 V to 5 V A common input signal applied is a 4 9 VPP signal wit...

Страница 16: ...sections of this document to understand how these connections are used Op onal ampli er power connec on Op onal external reference connec on Op onal external clock ADS127L11EVM PHI Controler Bu ered V...

Страница 17: ...left hand side of the GUI is the Pages control that allows access to the other key pages in the GUI Figure 6 4 also shows the ADC register settings The registers can be used to set the different devi...

Страница 18: ...ttings indicated in Figure 6 5 by using the Capture button The sample indices are on the x axis and there are two y axes showing the corresponding output codes as well as the equivalent analog voltage...

Страница 19: ...tigate the effects of non coherent sampling this discussion is beyond the scope of this document The 7 Term Blackman Harris window is the default option and has sufficient dynamic range to resolve the...

Страница 20: ...es such as the input drive circuits the reference drive circuit the ADC power supply and the ADC itself is reflected in the standard deviation of the ADC output code histogram that is obtained by perf...

Страница 21: ...25 V 10 X7R 0603 0603 C0603C105K3RA CTU Kemet C14 C17 C48 C52 C56 5 10uF CAP CERM 10 uF 25 V 10 X7R 1206_190 1206_190 C1206C106K3RA CTU Kemet C19 C35 C47 3 0 033uF CAP CERM 0 033 F 50 V 5 C0G NP0 AEC...

Страница 22: ...henol RF J10 J11 J13 3 Terminal Block 3 5mm Pitch 2x1 TH 7 0x8 2x6 5mm ED555 2DS On Shore Technology JP1 JP3 2 Header 100mil 2x1 Gold TH 2x1 Header TSW 102 07 G S Samtec LBL1 1 PCB Label 0 650 x 0 200...

Страница 23: ...1 3 01 RES 3 01 1 0 1 W AEC Q200 Grade 0 0603 0603 CRCW06033R01F KEA Vishay Dale SH J1 SH J2 SH J3 SH J4 SH J5 SH J6 6 1x2 Shunt 100mil Flash Gold Black Closed Top 100mil Shunt SPC02SYAN Sullins Conne...

Страница 24: ...out LDO Voltage Regulator RGW0020A VQFN 20 RGW0020A TPS7A4700RGW R Texas Instruments U9 1 Vin 3V to 36V 200mA Ultra Low Noise High PSRR Low Dropout LDO Linear Regulator DRB0008A VSON 8 DRB0008A TPS7A3...

Страница 25: ...ts for the ADS127L11 EVM Figure 7 1 PCB Layouts for the ADS127L11 EVM www ti com Bill of Materials Schematics and Layout SBAU351 APRIL 2021 Submit Document Feedback ADS127L11EVM PDK Evaluation Module...

Страница 26: ...SDO DRDY ADC CS ADC DRDY ADC START SYNC ADC AVSS AVSS AVSS AVDD1 VREF_2v5 1 F 16V C5 25V 22 F C3 10 F C2 REFERENCE 0R2 REFP REFN Minimum AVDD1 AVSS 3V for REF6225 0 R1 0R4 0 047 R5 120k R6 AVSS VIN 1...

Страница 27: ...P 0R47 AVSS VP 0R31 0R32 DNP AVDD1 0R29 AVDD1 AVSS 0R41 0R51 AVDD1 0R59 AVSS 7 1 8 5 VOCM 2 4 V V 3 6 THS4551IDGKR U5 15 0 R39 15 0 R40 AVSS GND AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS AVSS...

Страница 28: ...3T1G GND AVSS 5V_LDO EVM PHI Power TP14 5V_LDO DNP TP13 AVSS DNP TP15 5V5 DNP TP16 GND DNP GND 0R85 DNP 100nF C55 1 2 3 JP6 TSW 103 07 G S 1 2 3 JP7 TSW 103 07 G S EVM CLK EXT CLK EVM EXT CLK PHI CLK...

Страница 29: ...ents ADS127L11 24 Bit Wide Bandwidth Analog to Digital Converter data sheet www ti com References SBAU351 APRIL 2021 Submit Document Feedback ADS127L11EVM PDK Evaluation Module 29 Copyright 2021 Texas...

Страница 30: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 31: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 32: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 33: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 34: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 35: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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