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ADS1271EVM Hardware Details
Table 5. Analog Interface Pinout (J1) (continued)
Pin Number
Signal
Description
J1.8
Unused
J1.15
Unused
J1.18
REF(-)
External reference source low side
J1.20
REF(+)
External reference source input (2.5V NOM)
J1.9-J1.19 (odd) GND
Analog ground connections (except J1.15)
J1.10-J1.16
Unused
(even)
Table 6. Auxiliary Analog Input 1 Pinout (J4)
Pin Number
Signal
Description
J4.1
AUX1P
Auxiliary Signal Input 1 - Positive terminal
J4.2
AUX1N
Auxiliary Signal Input 1 - Negative terminal
J4.3
AUXREF1P
Auxiliary Reference Input 1 - Positive terminal
J4.4
AUXREF1N
Auxiliary Reference Input 1 - Negative terminal
J4.5
GND
Ground
Table 7. Auxiliary Analog Input 2 Pinout (J5)
Pin Number
Signal
Description
J5.1
AUX2P
Auxiliary Signal Input 2 - Positive terminal
J5.2
AUX2N
Auxiliary Signal Input 2 - Negative terminal
J5.3
AUXREF2P
Auxiliary Reference Input 2 - Positive terminal
J5.4
AUXREF2N
Auxiliary Reference Input 2 - Negative terminal
J5.5
GND
Ground
5.2.2
Analog Input Selection
The analog input signals can be routed directly to the two ADS1271s on the EVM or they can be routed
through an optional buffer amplifier stage built around U5 or U6. Consult the
to
determine the maximum analog input range.
summarizes the position of switches S1 and S2. S4
and S6 can be used to select the routing of the ADS1271 analog inputs as shown in
.
Table 8. Buffer Amplifier Options - S1 and S2
S1/S2 Position
Analog Inputs
Top
Input from J1
Middle
Input from J4/J5 auxiliary inputs
Bottom
No connection
Table 9. ADC Analog Input Options - S4 and S6
S4/S6 Position
Analog Inputs
Left
Input from Buffer Amplifier
Middle
Input from J1
Right
Input from J4/J5 auxiliary inputs
9
SBAU107C – November 2004 – Revised November 2014
ADS1271EVM and ADS1271EVM-PDK User's Guide
Copyright © 2004–2014, Texas Instruments Incorporated