2 Quick Start Guide
The EVM test procedure to obtain a valid data capture from the ADC32RF5xEVM using the TSW14J58EVM
data capture board is provided in this section. This is the starting point for all evaluations.
2.1 Introduction
The ADC32RF5xEVM includes the ADC32RF5x analog-to-digital converter with JESD204B interface, LMK04832
clocking chip, and an FMC connector suitable for connection to readily-available FPGA development boards or
to the TSW14J58EVM data capture board.
The FPGA on the capture card requires a device clock and SYSREF signal, the LMK04832 clock device
supplies these signals to the FMC connector for that purpose, as well as supplying SYSREF to the ADC.
This document conveys all information needed to bring up both the ADC32RF5xEVM and TSW14J58EVM data
capture board, and get a valid data capture with good FFT results.
The JESD204B interface requires a number of important parameters to be decided in advance of setting up
the data link, such as; number of lanes, number of converters, number of samples per frame, and a value K
number of frames per multi-frame, among other parameters. Both sides of a JESD204B link must be set up with
the same values for all these parameters, or else the FPGA that receives the data is not able to establish a
synchronized link.
Note
Getting these parameters inconsistent between ADC and FPGA is perhaps the biggest single reason
for an EVM setup to not function as expected.
The GUI installers that come with the ADC32RF5x and the TSW14J58EVM come with configuration files that
are meant to enable quick initial setup of a number of basic configurations. TI
strongly
suggests setting up the
EVM and data capture board with a configuration described in this document and getting a working setup before
modifying the configuration to be closer to what the end-application requires. In this way, the user can know that
the hardware is functioning and that there is a working configuration that they can go back to in the event of
difficulty developing their own configuration.
This document introduces the software that must be installed on a PC, and presents a basic setup for the
Bypass and DDC modes available in the ADC32RF5xEVM. The operating modes explained in this document
are:
•
Bypass Mode
–
2x Averaging
•
DDC (Decimation)
–
8x complex decimation
–
128x complex decimation
2.2 Software Setup
The proper software must be installed before beginning evaluation. See
the required software. To avoid potential issues, the software should be installed before connecting the
ADC32RF5xEVM and TSW14J58EVM to the computer for the first time.
contains links to find
the software on the TI website.
2.2.1 ADC32RF5xEVM GUI Installation
1. Download the GUI installer from the EVM tool folder at https://www.ti.com/tool/ADC32RF54EVM
2. Extract the installation files from the downloaded zip file.
3. Run
TI-ADC32RF5x.exe
and follow the procedure of the installer to complete installation.
2.2.2 High Speed Data Converter Pro GUI Installation
High Speed Data Converter Pro GUI (HSDC Pro) is used to control the TSW14J58EVM and analyze the
captured data. Please see the HSDC Pro GUI user’s guide (
) for more information.
1. Download HSDC Pro GUI installer.
2. Extract the installation files from the downloaded zip file.
Quick Start Guide
4
ADC32RF5xEVM User Guide
Copyright © 2021 Texas Instruments Incorporated
