Reference Board Functional Description
This reference board gives complete control over the ADC12D1X00RF and gives the user direct
performance results of the chip without the need for an elaborate setup. Each of the device's control pins
may be set high or low. Control is provided in two different manners - direct pin control with jumpers or
through the serial interface (the device's extended control mode) using the WV 5 register control panel.
In
order to use the extended control mode the ECE jumper must be set to LOW.
This is the recommended
method and gives the user the most flexibility and ease of use.
Analog Front-End:
The analog signal connection to the ADC is kept simple on this board in order to
achieve the highest possible bandwidth. The board is designed to be coupled to front-end circuitry in a DC
or AC coupled manner. AC-coupling requires the use of dc-blocks on the SMA connectors. By default, the
board is shipped by Texas Instruments with dc-blocks. In addition, the board is also jumper-configured for
DC-coupled operation (pin 9 on J15 is removed for DC operation).
Multi-channel ADC synchronization:
A DCLK_RST signal input is provided to synchronize the ADCs on
multiple boards or systems. In addition, the ADC12D1X00RF supports a new method of ADC
synchronization, called AutoSync. Please refer to the ADC12D1X00RF datasheet for more details.
4.2.2
LMX2541 Clock Synthesis chip
The LMX2541xxxx family provides a single-chip, very low-jitter clock solution at frequencies up to 2.0
GHz. In this application, the LMX2541LQ1570E / LMX2541LQ1778E is used - which can be programmed
to operate over a range of 1530-1636MHz / 1726-1840MHz. On the ADC1xDxxxx(RF)RB board, the
device is configured for a frequency in this range through the serial interface which may be controlled
through the WaveVision 5 register control panel. The particular frequency chosen is one that generates
the least phase noise. It is not necessarily a round number but depends on the loop feedback of the PLL’s
in the clock synthesis chip.
The clock source for the ADC can be selected between the on-board LMX2541 or an external clock
source connected through the J11 SMA connector. The selection is performed through the WV 5 register
panel. It is recommended that the external clock source should be connected and enabled before it is
selected.
For optimum performance, the external clock signal generator and the LMX2541 should
not be enabled at the same time.
This is because the RF relay used to select between them does not
provide adequate isolation to keep one from affecting the other. Having both clocks on simultaneously will
result in excessive spurious signals. The default setting for this board is the on-board LMX2541 clock
source.
4.2.3
FPGA
The design employs a Xilinx Virtex-4 FPGA for capturing the digital data. While the board is powered up
and configured, the FPGA is continually receiving data from the ADC. In response to a user command
through the WV-5 software, the ADC captures the desired amount of data in its on-chip buffer (up to a
maximum of 32K samples per-channel). The user can then command the FPGA to upload the captured
data to the PC through the USB interface for further processing.
This board can support the ability to program the FPGA for specific requirements. A standard JTAG
connector is provided for downloading FPGA object code from the Xilinx development environment.
Please note that Texas Instruments does not provide support for any user-designed FPGA functionality
beyond the standard functionality that is shipped with the board.
Hardware Trigger:
The external trigger feature of the Reference Board is designed to enable applications
which trigger a data capture. When the hardware trigger is enabled, an acquisition can be selected from
the software, but the actual beginning of data capture will be postponed until the external trigger pulse is
applied to the J26, the EXT_TRIG SMA.
Note:
This only applies to the data which is captured and displayed in the WaveVision GUI; the streaming
data to the FMC connector still runs continuously.
26
ADC1xDxxxx(RF)RB Reference Board
SNAU146 – September 2013
Copyright © 2013, Texas Instruments Incorporated