
16
SLAU701A – May 2017 – Revised January 2018
Copyright © 2017–2018, Texas Instruments Incorporated
Device Configuration
Chapter 4
SLAU701A – May 2017 – Revised January 2018
Device Configuration
The ADC device is programmable through the serial programming interface (SPI) bus accessible through
the FTDI USB-to-SPI converter located on the EVM. A GUI is provided to write instructions on the bus and
program the registers of the ADC device.
For more information about the registers in the ADC device, see the ADCxxDJxx00 device data sheet
(
4.1
Supported JESD204B Device Features
The ADC device supports some configuration of the JESD204B interface. Due to limitations in the
TSW14J57EVM firmware, all JESD204B link features of the ADC device are not supported.
lists
the supported and non-supported features.
(1)
Dependent on bypass or decimation mode and output rate selection. Always disable the JESD204 block before changing any of
the JESD204B settings. Once the settings are changed, re-enable the JESD204 block.
Table 4-1. Supported and Non-Supported Features of the JESD204B Device
JESD204B Feature
Supported by ADC Device
Supported by TSW14J57EVM
Supported by TSW14J56EVM
Number of lanes per link
(L)
L = 1, 2, 4, 8
(1)
L = 1, 2, 4, 8 supported
L = 1, 2, 4, 8 supported
Total number of lanes
active
1, 2, 4, 8, 16
1, 2, 4, 8, 16
1, 2, 4, 8
Number of frames per
multiframe (K)
K
min
= 3–18,
(1)
K
max
= 32, K
step
= 1 or 2
Most values of K supported,
constrained by requirement that
K × F = 4
n
Most values of K supported,
constrained by requirement that
K × F = 4
n
Scrambling
Supported
Supported
Supported
Test patterns
PBRS7, PBRS11, PBRS15, Ramp,
D21.5, K28.5, Repeat ILA, Modified
RPAT, Long/Short Transport, Serial
Out 0, Serial Out 1, Bypass Lane ID,
ADC Test Pattern
(1)
ILA, Ramp, Long/Short Transport
ILA, Ramp, Long/Short Transport
Speed
Lane rates from 0.8 to 12.8 Gbps
(1)
Lane rates from 2 to 15 Gbps
ƒ
(SAMPLE)
parameter must be properly
set in HSDC Pro GUI.
Lane rates from 0.6 to 12.5 Gbps
ƒ
(SAMPLE)
parameter must be properly
set in HSDC Pro GUI.
4.2
Tab Organization
Control of the ADC device features are available in the EVM, Control, JESD204B, NCO Configuration
tabs.