Chapter 3: Hardware
P52
3-4
You can read the ports with:
inportb(PPI+0); /* Port 0 */
inportb(PPI+2); /* Port 1 */
inportb(PPI+4); /* Port 2 */
These
inport(PPI+i);
statements return an 8-bit value for each port, with each bit corresponding to the
appropriate line on the port.
There are 24 TTL level I/O pins free to use for your application. These I/O lines are specified as 4 mA
driving current capability. PPI outputs are routed to J3.1-24. See schematics for PPI connection header J3
.
3.3.3
HCTL2020
Two quadrature decoder/counter interface chips, (HCTL2020, Hewlett Packard, U6 and U8) can be
installed on the
P52
. The quadrature decoder is used to interface incremental motion encoders with the
microprocessor system or to improve system performance for digital closed-loop motion control systems.
The HCTL2020 includes a quadrature decoder, a 16-bit counter, and an 8-bit bus interface. It features full
4x decoding, up to 14 MHz clock operation, high noise immunity due to Schmitt-trigger inputs and digital
noise filters, quadrature decoder output signals, up/down signal, count signals, and cascade output signal.
Many types of optical incremental encoder modules, such as the HEDS-9000, HEDS-9100, and HEDS-
9200 from HP, can be directly interfaced to the HCTL2020.
Channel A and B signals buffered with Schmitt trigger inputs (U7, 74HC14, CHA1/2, CHB1/2) are routed
at pins 31, 32, 35, and 36 on header J3. The HCTL2020 has built-in filters, which allow reliable operation
in noisy environments.
3.3.4
Four channel, 16-bit ADC (AD7655)
Two AD7655 ADC’s may be installed on the
P52.
The unique 16-bit parallel ADC (AD7655, 0-5V)
supports ultra high-speed (1 MHz conversion rate) analog signal acquisition. The AD7655 contains two
low noise, high bandwidth track-and-hold amplifiers that allow
simultaneous
sampling on two channels.
Each track-and hold amplifier has a multiplexer in front to provide a total of 4 channels analog inputs. The
parallel ADC achieves very high throughput by requiring only two CPU I/O operations (one start, one
read) to complete a 16-bit ADC reading. With a precision external 2.5V reference, the ADC accepts 0-5V
analog inputs at 16-bit resolution of 0-65,535. U22 inputs are found on J5.7-10, while U15 inputs are on
J5.11-14.
See sample program “
p52_ad.c
” in
\tern\186\samples\p52
or
\tern\586\samples\p52
for details on reading
the ADC. The sample program is also included in the pre-built sample project “
p52.ide
” in
\tern\186\samples\p52
and
\tern\586\samples\p52
.
Refer to the data sheet for additional specifications; \tern_docs\parts\ad7655.pdf.
3.3.5
Four channel, 16-bit DAC (DA8544)
The DA8544 is a parallel 16-bit D/A converter. This device supports 4 voltage output channels buffered by
ops with hardware configurable gain (default gain=2), giving default output range of ±5V. An on-board pot
allows for adjustable analog output voltage. The DAC requires an external 5V reference given by a
precision reference installed at U0.
The
P52
uses data bus D15 to D0 to directly interface to the DAC’s full 16-bit data bus for maximum data
transfer rate. Four outputs are routed to J5.17-20.
A sample program “
p52_da.c”
is in the
\tern\186\samples\p52
and
\tern\586\samples\p52
directory.
