UG_1215F_039
73S1215F Evaluation Board User Guide
Rev. 1.8
31
4.6 Schematic Information
This section provides recommendations on proper schematic design that will help in designing circuits
that are functional and compatible with the software library APIs provided by Teridian.
4.6.1 Reset Circuit
The 73S1215F Evaluation Board provides a reset pushbutton that can be used when prototyping and
debugging software. The RESET pin should be supported by the external components shown in
R8 should be around 10
Ω
. The capacitor C27 should be 10 µF. R8 and C27 should be mounted as
close as possible to the IC.
C43 (1000 pF) is shown for EFT protection and is optional.
S27
SW
1
2
RESET
3.3V
RESET
+
C27
10uF
R10
10k
R8
10
C43
1000pF
Figure 15: External Components for RESET
4.6.2 Oscillators
The 73S1215F offers two oscillators (see
); one for the primary system clock and the other for an
RTC (32 KHz). The system clock should use a 12 MHz crystal to provide the proper system clock rates
for the USB, serial and smart card interfaces. The system oscillator requires a 1 M
Ω
parallel resistor to
insure proper oscillator startup.
The RTC oscillator drives a standard 32.768 kHz watch crystal. Crystals of this type are accurate and do
not require a high current oscillator circuit. The oscillator in the 73S1215F has been designed specifically to
handle watch crystals and is compatible with their high impedance and limited power handling capability.
The 32 KHz oscillator does not require a parallel startup resistor.
Figure 16: Oscillator Circuit
73S1215F
http://www.datasheetcatalog.com/
