Terasic SDI-FMC, Руководство пользователя

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SDI-FMC User Manual
33
www.terasic.com
April 22, 2019
Figure 4-3 Data path for 3G SDI loopback test – CASE2
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Figure 4-4 shows the system block diagram of the 12G/3G SDI loopback test. The TWO_CH_12G
block contains two channels of 12G pattern generator and checker to perform two 12G SDI
loopback tests. Each pattern generator and checker is created based on Quartus SDI II IP. The LED0
and LED1 are used by the pattern checkers to report whether they receive a valid SDI pattern. The
TRS and Aligns pins of the SDI II controller are used to check whether a valid SDI pattern is
received.
When the LED lights up, it means a valid pattern is received. The block requires a 297MHz
reference clock for the pattern generator and 148.5MHz reference clock for the pattern checker. The
297 MHz comes from the Si5344 clock generator on the SDI-FMC board and 148.5MHz comes
from the FPGA mainboard. The
SI5344_CONFIG block is used to configure Si5344 chip through
I2C interface to generate the required 297MHz clock. The Si5344 required 27MHz reference which
can come from either LMH1983 chip on the SDI-FMC board or from FPGA mainboard. The
PLL_27MF block is used to generate the 27MHz clock. The SWITCH1 is used to specify whether
the 27MHz clock source is form the mainboard or Si5344 chip. The LMH1983_CONFIG block is
used to configure LMH1983 chip to generator 27MHz clock for Si5344 chip via I2C interface.
Please refer to the section
4.7 LMH1983 Configuration IP in this document for more details.
There are two configuration modes --- AV-Sync and Free-Run, used in this demonstration.
SWITCH2 is used to select which configuration mode is chosen. When AV-Sync mode is selected,
the video signal coming from the VIDEO-IN BNC connector J7 is used to synchronize the
generated 27MHz. The
SPI_12G_2CH block is a SPI-Daisy Chain controller. It is used to access
the six SDI chips on the SDI-FMC board. BUTTON1 can be used to toggle the mute function of
12G SDI Driver chips. When BUTTON1 is pressed, the SPI_12G_2CH block will mute SDI TX
chips. The SDI TX chips will be unmuted when BUTTON1 is released. The BUTTON2 can be