Terasic DE1-SoC-MTL2, Руководство пользователя

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DE1-SoC-MTL
2
User Manual
10
www.terasic.com
December 18, 2014
Figure 2-2 DE1-SoC-MTL2 (bottom view)
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Figure 2-3 shows the block diagram of MTL2 module. The IDE connector bridges all the wires
from the peripherals to the FPGA through an ITG adapter.
Figure 2-3 Block diagram of MTL2