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Telink TLSR8232 BLE SDK Developer Handbook
AN-19112700-E1
24
Ver.1.0.0
As shown in
, the “text” in firmware is the Flash code not placed in SRAM.
According to program locality principle, this part needs to be loaded to cache for
execution.
Though cache size is fixed as 2.25K, its starting address in SRAM is configurable.
To ensure enough space to store vector and ramcode in Flash, this starting address
must exceed “0_ramcode_size_”. As specified by 5316 MCU hardware,
cache starting address must be 256-
byte aligned, therefore, the “real_ramcode_size”
is the 256-
byte aligned size of “_ramcode_size_”. The starting address of cache
should be:
0x real_ramcode_size
= 0x ((_ramcod255)/256 )* 256
= 0x _ramcode_size_div_256_* 0x100
The starting address of cache is 256-
byte aligned “0x
_ramcode_size_div_256_* 0x100
”, while generally “_ramcode_size_” is not 256-byte
aligned. The actual size of the code loaded from Flash to RAM when power on is
“_ramcode_size_div_256_* 256”, which means a part of SRAM space is wasted.
For example: Suppose
“_ramcode_size_” is 0x780, and the size of code loaded to
SRAM is 0x800, then the code of 0x00000 ~ 0x007ff in Flash firmware is memory
resident, the 128 bytes of 0x808780 ~0x8087ff in SRAM is wasted as non-ramcode
is resident in SRAM.
If
“_ramcode_size_” is 0x701, 255 bytes will be wasted; if “_ramcode_size_” is
0x800, no byte will be wasted. The maximum size of wasted SRAM area is 255
bytes, therefore, in program design users need to check list files to view ramcode
occupation and try to avoid serious waste.
Since cache size is fixed as 2.25K (0x900), the ending address of cache should be:
0x real_ramcod 0x900 = 0x real_ramcode_size
3) data / bss
“data” in SRAM serves to store initialized global variables of a program, i.e. global
variables which are non-zero initially.
“bss” in SRAM serves to store uninitialized
global variables of a program, i.e. global variables which are zero initially).
“data” and
“bss” are introduced here as one section as they are connected – “data” is followed
by “bss”.
cache
is followed by “data” and “bss”, The starting address of “data + bss” is the
ending address of cache
, i.e. “0x _ramcode_size_div_256_* 0x100”. The
code in “boot.link” shown below directly defines the starting address of “data”.
. = 0x _ramcode_size_div_256_ * 0x100;
.data :
The initial value of the initialized globa
l variables in “data” is “data init value” in
Firmware shown in
4) stack / unused area
“stack” in SRAM starts from the highest address 0x80C000 (default 16kB SRAM) or
0x810000 (32kB SRAM) and to low address. Its SP pointer will descend during push
operation, and ascend during pop operation.