Teledyne Lecroy PCI Express 3.0 Mid-Bus Probe, Инструкция по установке и эксплуатации

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Teledyne LeCroy Multi‐Lead / Mid‐Bus Probes
2 PCIe 3.0 Mid‐Bus Probe Installation and Usage Guide
1.4 Multi-Lead / Mid-Bus Probes
The multi‐lead probe allows individual connections to each bus trace on the board. If the
product has an embedded PCI Express bus (e.g., a bus which runs between chips on the
same circuit board), then either a mid‐bus probe or a multi‐lead probe can be used. The
mid‐bus probe requires a connection footprint (see below) to be designed into the board.
The Teledyne LeCroy mid‐bus probes are 16‐channel differential signal probes that meet
the demand for high‐density signal access, accuracy and repeatability while providing
connector‐less attachment to the device under test. They are based upon the
configuration that was initially recommended in the Intel PCI Express Mid‐Bus Probing
Footprint and Pinout Revision 1.0 document dated 8/05/03 and the subsequent revisions.
A mid‐bus probe is one of the tools that can greatly help engineers debugging PCI Express
buses. A PCI Express mid‐bus probing solution provides direct probing capability of a PCI
Express bus at a width of up to 16 lanes. To accommodate a mid‐bus probe, a special pad
layout is required to expose the PCI Express differential pairs on the surface of the target
board. (See figure below).
Figure 1.1: Board Trace Layout for a Mid-Bus Probe
Although not part of the PCI Express specifications, the industry has developed common
mid‐bus probe footprints for PCIe 1.0a, PCIe 2.0 and PCIe 3.0 applications (the "full‐size"
PCIe 3.0 footprint is shown on the right). These footprints are designed into the PCB. For
PCIe 3.0 applications, the probe cable attachment uses a probe connector which is
mounted the PCB as shown in the lower image on the below.
Figure 1.2: Full Width Connector for a Mid-Bus Probe
The appropriate footprint is recommended for use with all types of test equipment
including protocol analyzers, logic analyzers and oscilloscopes. The required pad layout
can be in x4 (half‐size), x8 (full‐size) or x16 (dual full‐size) configurations depending on
the maximum number of lanes that need to be probed. All footprint sizes support probing
at reduced lane widths (e.g., x1) and at lane widths up to the maximum footprint size.
The illustration
Figure 2.1 on page 7 shows the completed assembly for probing up to x8
configurations (for x16 configurations, a second Y‐cable, probe pod, header cable