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Reference
The following
fi
gure shows a footprint example where two pads use vias. (See
Figure 17.). Detail A describes the recommended position of the via with respect
to the pad.
All dimensions are per standard IPC tolerance, which is ±0.004 in.
Figure 17: Optional Via-in-Pad placement recommendation
22
P6450 High-Density Logic Analyzer Probe Instruction Manual
Содержание P6450
Страница 4: ......
Страница 12: ...Compliance Information viii P6450 High Density Logic Analyzer Probe Instruction Manual...
Страница 16: ...Preface xii P6450 High Density Logic Analyzer Probe Instruction Manual...
Страница 42: ...Specifications 26 P6450 High Density Logic Analyzer Probe Instruction Manual...
Страница 46: ...Maintenance 30 P6450 High Density Logic Analyzer Probe Instruction Manual...
Страница 50: ...Replaceable Parts Figure 21 Optional accessories 34 P6450 High Density Logic Analyzer Probe Instruction Manual...