Tektronix 422, Инструкция по эксплуатации

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Circuit Description—Type 422 AC-DC
CHOPPED. In the CHOPPED position o f the Mode
switch, the Switching M ultivibrator stage free runs as an
astable m ultivibrator4 at about a 150-kilohertz rate. In this
mode, the emitters of Q265 and Q275 are connected to
+12 volts through R264 or R274. A t the time of turn-on,
one o f the transistors begins to conduct; fo r example,
Q265. Q265 forward biases the Channel 1 shunt diodes to
prevent the Channel 1 signal from reaching the Delay-Line
Driver stage. A t the same time, the Channel 2 Diode Gate
passes the Channel 2 signal to the Delay-Line Driver stage.
T he fre q u e n c y -d e te rm in in g components in the
CHOPPED mode are C267-R264-R274. Switching action
occurs as follows: When Q265 is on, C267 begins to charge
toward +12 volts on the Q275 side through R274. The
emitter o f Q275 also goes toward +12 volts as C267
charges. The base level o f Q275 is fixed at a positive point
determined by divider R269-R277 between +12 volts and
the collector level of Q265. When the emitter voltage of
Q275 reaches a level slightly more positive than its base,
Q275 conducts. The collector o f Q275 goes positive as it
conducts, and pulls the base o f Q265 positive through divi­
der R279-R267 to turn Q265 off. When Q265 turns o ff, its
collector goes negative to reverse bias the Channel 1 Diode
Gate shunt diodes and allow the Channel 1 signal to pass to
the Delay-Line Driver stage. Simultaneously, the collector
of Q275 goes positive as it turns on to forward-bias the
Channel 2 Diode Gate shunt diodes, blocking the Channel 2
signal. C267 begins to charge towards +12 volts again, but
this time through R264. The emitter o f Q265 goes positive
as C267 charges until Q265 turns on. Q275 is turned o ff as
described above to switch the Diode Gate and the cycle
begins again.
The Chopped Blanking A m p lifie r stage Q294 provides an
output pulse to the CRT Circuit which blanks out the tran­
sition between the Channel 1 trace and the Channel 2 trace.
As the Switching M ultivibrator changes states, the negative­
going step at the emitter o f either Q265 or Q275 is connec­
ted to Q294 through C266 or C276. The pulse at the base
o f Q294 turns it o ff momentarily to produce a positive­
going pulse at its collector. The positive-going pulse at the
collector o f Q294, which is coincident w ith trace switching,
is connected to the CRT Circuit through R295.
ALG ADD. In the ALG ADD position of the Mode
switch, the Diode Gate stage allows both signals to pass to
the Delay-Line Driver stage. The Channel 1 and Channel 2
Diode Gates are both held on by +12 volts connected to the
anodes of the series diodes through R210 and R211. Since
both signals are connected to the Delay-Line Driver stage,
the output signal is the algebraic sum of the signals on
Channel 1 and 2.
Delay-Line Driver
O utput signal from the Diode Gate stage is connected to
Delay Line Driver stage Q224 and Q234. Q224 and Q234
are connected as feedback amplifiers w ith R221-R224 and
R231-R234 providing feedback from the collector to the
4 Millman and Taub, pp. 438-451.
b a s e . T h e d e la y - lin e c o m p e n s a tio n n e tw o rk
C 2 2 7 -C 2 2 8 -C 2 3 7 -R 2 2 7 -R 2 2 8 -R 2 3 7 , provides high-
frequency compensation fo r the Delay Line. C237 and
R237 are adjustable to provide optimum response. R226
and R236 along w ith the output impedance o f the Delay-
Line Driver stage comprise the reverse termination fo r the
Delay Line.
Diodes D210 and D211 clamp the input o f the Delay-
Line Driver stage if it goes more negative than about 0.5
volts. This clamping action prevents the output transistors
of the Channel 1 and Channel 2 Input am plifier circuits
from going into saturation during alternate trace switching
time. Diodes D213 and D214 connected between the bases
of Q224 and Q234 protect the Delay-Line Driver stage
from high-amplitude signals by lim iting the peak-to-peak
voltage difference at the bases of Q224 and Q234 to about
one volt. The Common Mode Current adjustment R215
provides a means o f adjusting the Q224-Q234 em itter vo lt­
age to zero volts. This centers the voltage and current levels
in the Delay-Line Driver stage.
CH 1 & 2 Trigger P icko ff Network
The trigger signal fo r CH 1 & 2 trigger operation is ob­
tained from the collector of Q224. C217-R217-R218-R219
comprise the CH 1 & 2 Trigger Pickoff Network. C217 is
adjustable to allow the high-frequency response o f the Ch 1
& 2 trigger signal to be matched to the Ch 1 only response.
C235 and R235 connected to the collector o f Q234 balance
the Delay-Line Driver stage by providing the same load at
the collector o f Q234 as the CH 1 & 2 Trigger Pickoff
Network provides at the collector o f Q224.
Delay Line
The Delay Line provides approximately 150 nano­
seconds delay fo r the vertical signal to allow the Sweep
Generator circuit time to initiate a sweep before the vertical
signal reaches the vertical deflection plates o f the CRT. This
allows the instrument to display the leading edge o f the
signal originating the trigger pulse when using internal trig ­
ger .
Output Amplifier
The vertical signal at the outp ut o f the Delay Line is
applied to the O utput A m plifier through the networks
C242-R242 and C252-R252. R242 and R252 along with
the input impedance of this stage provide the forward term ­
ination fo r the Delay Line. The O utput A m p lifie r stage
provides the final voltage amplification fo r the vertical
deflection signal before it is applied to the vertical deflec­
tion plates o f the CRT. The signal at the collector o f Q244
is connected to the upper vertical deflection plate through
L245, and the signal at the collector o f Q254 is connected
to the lower vertical deflection plate through L255. These
inductors are adjustable to provide correct high-frequency
response.
SWEEP TR IG G ER
General
The Sweep Trigger circuit produces trigger pulses to start
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