background image

A

3

2

1

F

E

D

C

B

8

7

6

5

5

4

3

2

1

THIS DRAWING CANNOT BE COMMUNICATED TO UNAUTHORIZED PERSONS COPIED UNLES S PERMITTED IN WRITING

F

E

D

C

B

A

4

6

7

8

FORMAT DIN A2

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DQSU

/DQSU

DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQSL

/DQSL

DML

BA0
BA1
BA2

/CS
/RAS
/CAS
/WE

CK

/CK

CKE

ODT

/RESET

VREFCA

VREFDQ

ZQ

VDDQ

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VSSQ

VSSQ1

VSSQ2

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VDD

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VSS

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

NC1
NC2
NC3
NC4
NC5
NC6
NC7

VSS11

GND

RDQM0

RDQS0

RDQS0#

RDQ0
RDQ1
RDQ2
RDQ3
RDQ4
RDQ5
RDQ6
RDQ7

RDQM1

RDQS1

RDQS1#

RDQ8
RDQ9

RDQ10
RDQ11
RDQ12
RDQ13
RDQ14
RDQ15

RDQM2

RDQS2

RDQS2#

RDQ16
RDQ17
RDQ18
RDQ19
RDQ20
RDQ21
RDQ22
RDQ23

RDQM3

RDQS3

RDQS3#

RDQ24
RDQ25
RDQ26
RDQ27
RDQ28
RDQ29
RDQ30
RDQ31

AVDD33_DDR
AVDD12_DDR

AVSS12_DDR

RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
RA8
RA9
RA10
RA11
RA12
RA13
RA14
RA15
RBA0
RBA1
RBA2
RCS#
RCSD#
RRAS#
RCAS#
RWE#
RODT
RCKE
RRESET
RCLK0
RCLK0#
DDRVREF_A1
DDRVREF_A2
ARTP
ARTN
MEMTP
MEMTN
TP_HPCPLL
TN_HPCPLL

DDRV
DDRV1
DDRV2
DDRV3
DDRV4
DDRV5
DDRV6
DDRV7
DDRV8
DDRV9

DDRVA

DDRV10
DDRV11
DDRV12
DDRV13
DDRV14

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

DQSU

/DQSU

DMU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQSL

/DQSL

DML

BA0
BA1
BA2

/CS
/RAS
/CAS
/WE

CK

/CK

CKE

ODT

/RESET

VREFCA

VREFDQ

ZQ

VDDQ

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

VSSQ

VSSQ1

VSSQ2

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VDD

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VSS

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

NC1
NC2
NC3
NC4
NC5
NC6
NC7

VSS11

Near DDR

Near U001

Differential Clock

Support Asymmetry/Symmetry DRAM

Change PN

Bottom SIDE

Near DRAM

TOP SIDE

Bottom SIDE

TOP SIDE

DDR REF Volt

SOC-DDR

DDR

Change PN

For MCM Dram VREF

Close to U001

U001 Bottom SIDE

K3

K7

L2

G3

B7

J3

T2

L3

N3

P7

L7

R7
N7

P3

N2

P8
P2

R8
R2

T8

R3

M2

N8

M3

J7

K9

E7

D3

E3
F7
F2
F8
H3
H8
G2
H7

F3

C7

D7
C3
C8
C2
A7
A2
B8
A3

J1
J9

L1
L9

M7

T3
T7

K1

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

D2

E9

F1

H2

H9

M8

H1

A9

E1

T9

B3

G8

J2

J8

M1

M9

P1

P9

T1

B9

B1

D1

D8

E2

E8

F9

G1

G9

L8

U602

H5TQ4G63AFR

AA3
Y2
Y1
U3
AE2
T3
AE1
R2
AF2
R1
AF1
W2
AB3
AB2
AD2
U1
AD3
U2
AC3
V1
AC1
V2
AF8
AG7
AH7
AG3
AG12
AF3
AH12
AG2
AG13
AH2
AH13
AG6
AF9
AG9
AF12
AH4
AF11
AG4
AG10
AF5
AH10
AF6

U4
Y15

W15

AB4

AC9

AE3
AE6

AD9

AE4

AC11

AD5

AE9
AE5
AE7

AD11

AE12

AC5

AE10
AE11

AD7

AE8

AC7

V4

W4

AA5
AA6

AC4

W5
W6

U6

AA4

Y4

U5

AE13

W9
W8

Y8
Y9

AC20
AD20

R4

T4

R5

T5

R6

T6

R7

T7

R8

V8

T8

R9

T9

U9

V9

AB12

U001

MT5655

ARTN

R529

48R7

K3

K7

L2

G3

B7

J3

T2

L3

N3

P7

L7

R7
N7

P3

N2

P8
P2

R8
R2

T8

R3

M2

N8

M3

J7

K9

E7

D3

E3
F7
F2
F8
H3
H8
G2
H7

F3

C7

D7
C3
C8
C2
A7
A2
B8
A3

J1
J9

L1
L9

M7

T3
T7

K1

B2

D9

G7

K2

K8

N1

N9

R1

R9

A1

A8

C1

C9

D2

E9

F1

H2

H9

M8

H1

A9

E1

T9

B3

G8

J2

J8

M1

M9

P1

P9

T1

B9

B1

D1

D8

E2

E8

F9

G1

G9

L8

U601

H5TQ4G63CFR-RDC

R612

0R

2_RCSD

1_RCS

R528

120R

C651

0.1U

R618

47R

R615

47R

C637

0.1U

C601

0.1U

C634

0.1U

R606

1K

R605

1K

R604

1K

R603

1K

1K

R530

NC/

0.1U

C552

C553 1U

RDQS0B

1_A1

2_A12

2_A6

RA15

2_A8

2_A14

2_A4

2_A1

RA4

RA1

2_BA1

2_A10

2_BA0

2_BA2

RBA1

RBA0

5

4

7

2

1

3

6

8

RP608 22R

2_A3

2_A13

RA3

RA9

RA13

RRESET

RRESET

2_A7

2_A2

2_A5

2_A0

RA7

RA2

RA5

RA0

2_CAS#

RA15

RA12

RA11

RA6

1_A15

RA8

RA14

RA4

1_A14

1_A4

RA1

RBA1

RA10

RBA0

RBA2

1_A10

1_BA2

RA3

RA13

1_A3

RA7

RWE

RODT

1_CAS#

RRAS

1_RAS#

0.1U

C636

DDR_1V5

DDR_1V5

DDR_1V5

DDR_1V5

DDR_1V5

DDR_1V5

DDR_1V5

DDR_1V5

DDR_1V5

A_VREFCA1

DDRVREF_A1

0.1U

C630

0.1U

C629

C625

0.1U

0.1U

C624

1U

C623

22U

C619

0.1U

C616

0.1U

C615

0.1U

C614

C613

0.1U

NC/

0.1U

C611

0.1U

C610

22U

C608

0.1U

C607

10U

C551

C550

0.1U

0.1U

C548

1U

C545

0.1U

C546

C617

1U

R601

240R

1U

C549

RDQS2

C631

1U

DDRVREF_A2

DDRVREF_A2

MCLK0B

1K

R531

NC/

RCLK0B

RCAS

RCS

RBA1

C609

4U7

5

4

7

2

1

3

6

8

RP612

22R

10U

C544

22U

C632

NC/

0.1U

C628

0.1U

C627

0.1U

C626

0.1U

C621

C604

1U

0.1U

C612

22U

C602

C606

0.1U

0.1U

C605

0.1U

C633

5

4

7

2

1

3

6

8

RP603

22R

10U

C603

5

4

7

2

1

3

6

8

RP604

22R

5

4

7

2

1

3

6

8

RP606

22R

5

4

7

2

1

3

6

8

RP605

22R

5

4

7

2

1

3

6

8

RP602 22R

5

4

7

2

1

3

6

8

RP601

22R

R602

240R

5

4

7

2

1

3

6

8

RP609

22R

5

4

7

2

1

3

6

8

RP610

22R

5

4

7

2

1

3

6

8

RP611

22R

5

4

7

2

1

3

6

8

RP607

22R

0.1U

C635

0.1U

C618

10U

C620

0.1U

C622

0.1U

C547

RRESET

1_A12

1_A11

1_A6

1_A8

1_BA1

1_BA0

1_A9

1_A13

RRESET

1_A7

1_A2

1_A5

1_A0

1_WE#

RODT

RA5

RA9

RRESET

RA2

RA0

RCAS

RA12

RA11

RA6

RA8

RA14

RA10

RBA2

RWE

RODT

RCAS

RRAS

2_A15

2_A11

2_A9

2_WE#

RODT

2_RAS#

A_VREFCA1

RODT

1_A14

1_A13

1_A15

RDQ15

RDQ14

RDQ13

RDQ12

RDQ11

RDQ10

RDQ9

RDQ8

RDQS1

RDQS0

RDQ7

RDQ6

RDQ5

RDQ4

RDQ3

RDQ2

RDQ1

RDQ0

RDQM1

RDQM0

RCKE

RCLK0

1_BA2

1_BA1

1_BA0

1_WE#

RRESET

1_RAS#

RDQS1B

RDQS0B

1_RCS

RCLK0B

1_CAS#

DDRVREF_A1

A_VREFCA2

RODT

2_A14

2_A13

2_A15

RDQ31

RDQ30

RDQ29

RDQ28

RDQ27

RDQ26

RDQ25

RDQ24

RDQS3

RDQS2

RDQ23

RDQ22

RDQ21

RDQ20

RDQ19

RDQ18

RDQ17

RDQ16

RDQM3

RDQM2

RCKE

RCLK0

2_BA2

2_BA1

2_BA0

2_A9

2_A8

2_A7

2_A6

2_A5

2_A4

2_A3

2_A2

2_A12

2_A11

2_A10

2_A1

2_A0

2_WE#

RRESET

2_RAS#

RDQS3B

RDQS2B

2_RCSD

2_CAS#

DDRVREF_A2

RBA2

1_A9

1_A8

1_A7

1_A6

1_A5

1_A4

1_A3

1_A2

1_A12

1_A11

1_A10

1_A1

1_A0

RA3

RA2

RA1

RA0

RA9

RA8

RA7

RA6

RA5

RA4

RA12

RA11

RA10

RA15

RA14

RA13

RBA0

RCSD

RODT

RWE

RRAS

RCKE

MCLK0

RRESET

ARTP

RDQ26

RDQ25

RDQ24

RDQS3B

RDQ31

RDQ30

RDQ29

RDQ28

RDQ27

RDQ0

RDQS0

RDQM0

RDQ4

RDQ3

RDQ2

RDQ1

RDQM1

RDQ7

RDQ6

RDQ5

RDQ9

RDQ8

RDQS1B

RDQS1

RDQ13

RDQ12

RDQ11

RDQ10

RDQM2

RDQ15

RDQ14

RDQS3

RDQ17

RDQ16

RDQS2B

RDQ21

RDQ20

RDQ19

RDQ18

RDQM3

RDQ23

RDQ22

A_VREFCA2

3V3

CORE_1V2

R613

100R

R620

0R

MCLK0B

MCLK0

RCLK0B

RCLK0

R621

0R

RCS

RCSD

Содержание 32D2930

Страница 1: ...n 3 Alignment Procedure 4 Block diagram 5 Scheme Diagram 6 Troubleshooting SORGH GUDZLQJ This m anual i s t he l atest at t he t ime of pr inting and doe s not include the modification which may be ma...

Страница 2: ...ectric shock to the person The exclamation point within an equilateral triangle is intended to alert the user to the presence of important operating and maintenance servicing instructions in the liter...

Страница 3: ...impact of any kind Be particularly careful not to damage the picture tube surface 9 Unplug this television set from the wall outlet before cleaning Do not use liquid cleaners or aerosol cleaners Use...

Страница 4: ...ng conductors location of antenna discharge unit connection to grounding electrode and requirements for the grounding electrode 15 2 Note to CATV system installer Only for the television set with CATV...

Страница 5: ...durein youroperatinginstructions do not attempt any further adjustment Unplug the set and call your dealer or service technician 22 Whenever the television set is damaged or fails or a distinct change...

Страница 6: ...ion Auto Close Manual Life Time Typ 30 000hrs Channels Edit For Channel renamed Color 16 7 Million 8bit Input Settings For Input source device choice Refresh Rate 60Hz Sleep Timer Yes System Update Ye...

Страница 7: ...40 feet High pcs 1180 Net Weight With Stand Kg 4 5kg Net Weight Without Stand Kg 4 4kg Gross Weight With Packaging Kg 6 0kg VESA Mounting Dimensions LxH mm 100X100 Operation Manual English Default Wa...

Страница 8: ...Factory Test Alignment Specification For MT56 AP Series V1 0 1 TCL World Wide R D FPD CENTER Factory Test Alignment Specification V1 0 MT56 AP PREPARED BY FENG LIU DATE 2015 02 13 APPROVED BY DATE...

Страница 9: ...Accessing Way 8 3 2 Design Menu 8 3 3 Other Menu 9 3 4 Service Menu 9 3 5 Param Setting Menu 10 4 Test Alignment 11 4 1 Pre Conditions and Power Supply Check 11 4 2 Project ID Modification 11 4 3 Func...

Страница 10: ...ain Menu FMM is divided into Factory menu and Design menu Factory Menu covers all indispensable functions during manufacture such as White Balance Adjustment SHOP etc while Design Menu includes Servic...

Страница 11: ...VGA IC Details Position Main program UF01 Support online upgrade Mboot UF01 Support online upgrade EEPROM U702 Note The software boot for U702 can be programed by Flash Tool exe Every set has its uni...

Страница 12: ...ast item submenu Finally press 9 7 3 5 consecutively b When the Factory hotkey item of Factory Menu is enabled ON you can see the flashing Factory Captions Info on the lower left corner press Back but...

Страница 13: ...ance ADC data Power On Mode STANDBY ON the set will power on after switching on power STANDBY the set will remain standby status after switching on power LAST the set will turn to the status in which...

Страница 14: ...n Hotel Menu we also provide a great deal of useful functions for specific applications in hotel White Balance Name Default Description Source ATV Press RCU left right key to change the TV source Colo...

Страница 15: ...u key exit the Factory menu Design Captions Information is the same to Factory Captions Info 3 2 Design Menu Design Menu Name Default Description Design Mode hotkey OFF Design Menu shortcut button swi...

Страница 16: ...into test pattern and restarting TV is the only way to excit UartEnable OFF The switch of VGA serial port information The item must be disabled OFF after production DeviceID Show the device id of TV M...

Страница 17: ...se shouldn t change the settings in the menu Param setting Menu Name Default Description Sound Setting Set sound mode balance sound scene etc Picture Curve Exclusively used by R D Picture Setting Set...

Страница 18: ...he relevant block diagram and circuit diagram make sure that no serious issue or mistake can destroy the board For example the output of DC DC and LDO should not be shorted to ground Supply a suited v...

Страница 19: ...s When the set restart automatically you have successfully changed project ID Here below is none exhaustive ProjectID table for reference MODEL ProjectID Panel Name L40S4690FS 001 LVF400NEAL 4 3 Funct...

Страница 20: ...quirements rev v3 9 LAN Test A rough LAN test can be done by connecting Ethernet to TV s RJ45 and check that IP subnet mask DNS addresses which are visible on Home Settings Network Ethernet settings I...

Страница 21: ...rn In Additional aging for White Balance alignment is no more necessary due to consistent picture performance with cloning usage This function is accessible by selecting Factory menu Warm up pressing...

Страница 22: ...boot Connect the computer and mainboard VGA port by a serial port tool Serial connector definition VGA P303 Pin4 RXD VGA Pin11 TXD Open MTK Mboot software programming tool Flash Tool and set serial po...

Страница 23: ...low screen Upgrade process takes about 3 5 minutes After updating the TV set will reset automatically 2 Online Upgrade Download the bin zip file V8 MT56551 LF1VXXX Zip to the root directory of your US...

Страница 24: ...tlet using a network cable Note that the wall outlet is attached to a modem or router anywhere in your house Select Home Settings Network Ethernet Settings IP Settings then the TV will obtain IP addre...

Страница 25: ...e chromaticity coordinate tolerance X Y X Y LCD cold 13000K 0 270 0 270 0 015 normal 10000K 0 280 0 290 warm 7500K 0 300 0 305 White balance adjustment takes the Normal color temperature of HDMI chann...

Страница 26: ...Chassis Block Diagram 9...

Страница 27: ...rmal DDR_1V5 CI_VCC CORE_1V2 12V 5V 12V 5V CORE_1V2 DDR_1V5 5V 3V3_Normal 5V TU_3V3 5V 3V3_DEMO 5V 1V1_DEMO 3V3 1V8 12V 3V3SB 3V33B CORE_1V2 3V3 3V3 1V8 3V3 12V 3V3_DEMO 1V1_DEMO 3V3_Normal 1V8 5V MHL...

Страница 28: ...0 1U WOL RA131 22K POWER_ON 5V RA132 47K 5V 12V_M G D S QA130 PMV65XP GND GND B C E QA131 BT3904 RA133 10K CA130 0 1U RA130 120K 0 1U CA111 5V RA110 10K CDJ2 0 1U RDJ3 33K LDJ1 2 2UH DDR_1V5 16 14 7...

Страница 29: ...O CT100 0 022U TUNER_VCC RT20 680R 12 6 7 8 1 3 2 4 5 9 10 11 TUN1 NC IFN IFP CT40 0 1U 4K7 RT10 RT11 4K7 RT15 33R RT16 33R 10U CT15 CT33 22P CT34 22P CT14 10PNC 10P CT13 NC 10P CT9 CT8 10P 10K RT60 N...

Страница 30: ...R316 2K R315 2K VGA_SDA VGA_SCL C314 4700P C322 220P R326 10K VGA_5V R319 100R R317 100R C323 0 1U R325 220R R324 120R 1 2 D304 PESD5V0S1BL NC VGA_SOG_IN VGA_RXD VGA_TXD C321 33P NC NC 33P C320 C319 1...

Страница 31: ...69 100R R499 33R R480 820R R481 300K R483 300K R434 4R7 R433 4R7 R432 4R7 R431 4R7 R430 4R7 R429 4R7 R428 4R7 R427 4R7 R498 4R7 R497 4R7 R496 4R7 R495 4R7 R494 4R7 R493 4R7 R492 4R7 R491 4R7 R484 4R7...

Страница 32: ...SIDE SOC POWER SOC EMMC SOC CI SOC RESET SOC USB SOC Ethernet STRAPPING OPCTRL3 eMMC pins share pins w s NAND ICE moce 24M ROM to eMMC boot from ICE moce 24M ROM to 60bit ECC Nand boot ICE mode 24M s...

Страница 33: ...7 N7 P3 N2 P8 P2 R8 R2 T8 R3 M2 N8 M3 J7 K9 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 F3 C7 D7 C3 C8 C2 A7 A2 B8 A3 J1 J9 L1 L9 M7 T3 T7 K1 B2 D9 G7 K2 K8 N1 N9 R1 R9 A1 A8 C1 C9 D2 E9 F1 H2 H9 M8 H1 A9 E1 T9 B3...

Страница 34: ...H3 H4 H5 J2 J3 J4 J5 J6 T5 H6 U5 U9 T10 N5 M6 AA3 AA5 Y4 W4 K6 K4 M7 P5 R10 U8 Y2 Y5 AA4 AA6 UF01 CPP THGBM5G6A2JBH2H C711 1U C710 10U C704 10U 1V8 3V3 C712 0 1U C713 0 1U C701 2U2 1V8 1V8 C716 0 1U...

Страница 35: ...RCIN SDA SCL RESET VSS RB VDDRB VDDLB LB GNDL NC2 VDDLA LA VDD SA0 MCLK BCLK 5 5 5 5 5 5 1 5 7 7 Close to SOC AD82587D_12V 9 9 1000P C817 C816 1000P C822 1000P 1000P C823 C821 0 22U 0 22U C815 13 14 1...

Страница 36: ...anel without IIC 8 DIM option for MCU 9 Define MCU port 3D_FORMAT0 as TCON_WP_OUT for panel AUO T500HVN04 5 3 Place P901 close to P902 on the same PCB board R910 R911 R913 R914 R915 R916 2 8 Bit PANEL...

Страница 37: ...F1051 F1050 1 2 PESD5V0S1BL D1056 2 1 D1055 PESD5V0S1BL C1032 22P NC C1036 470P NC C1035 470P NC C1034 2U2 C1033 2U2 C1019 4700P R1019 10R R1025 100R R1026 100R C1028 0 01U C1027 0 01U C1026 0 01U R10...

Страница 38: ...Trouble Shooting No Picture 41...

Страница 39: ...Trouble Shooting No Sound 42...

Страница 40: ...Trouble Shooting Abnormal Picture 43...

Страница 41: ...Trouble Shooting Network Fault wired 44...

Страница 42: ...Trouble Shooting Network Fault wireless 45...

Страница 43: ......

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