Tatung V23CLTT, Руководство по обслуживанию

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9. Electronic Circuit Description
9.1 Main Board Circuit
(1) PC signal
Refer to circuit diagram sheet 1 of PWB-0610.
The analog R.G.B video input signals are supplied through the 15Pin D-sub cable
which is terminated at PJ03. These three input signals are approximately 0.7Vpp in
amplitude.
R031
、
R032 and R033 give resistance of 75
Ω
respectively for impedance matching.
These R
、
G
、
B video signals are ac coupled via 0.047U capacitor C021
、
C016
、
C013
and then fed into the I001 AD converter (AD6883-140) at Pin54
、
49 and 43 respectively.
These analog R
、
G
、
B video signals are converted to the their digital forms in I001. The
outputs of digital data including 8 bits red
、
8 bits green
、
8b bits blue signals are
assigned at Pin70 ~ 77
、
Pin 2 ~ 9 and Pin 12 ~ 19 of I001
，
and applied to Port A of I019
(Scaler
：
Tp6760 ) Hsync & Vsync are applied to I001 (AD9883-140) #30 & #31 and
the processed signal taken from #66 & #64 are fed into I019 (Tp6760) #18
、
#19..
CLK signal is taken from I001 (AD9883-140) #67 and applied to I019 (TP6760) #156.
The LCD-TV is designed to have the DDC/2B FUNCTIONS. Communication between
the LCD-TV and computer for DDC is via PJ03 (D-sub connector ) #15
、
#12 which are
defined as SCL
、
SDA signals. The computer will read out the EDID from the I004
(EEPROM) and the EDID data is written into the EEPROM in the factory during
production.