The sequence is initiated from a steady state condition
where the switching transistor is on. At that time the cur-
rent generator, the range capacitor and the comparator in-
put are shorted to ground. The output from the comparator
is set to “1". A positive transition from the VCO circuit
modifies the state of the flip-flop turning the transistor off.
The current from the current generator is allowed to flow
to the range capacitor. The capacitor is charged to a level
equal to the reference voltage. At that time the comparator
flips its output state to ”0", forcing this sequence to an end.
The following describes the various sections of the pulse
generator in details.
CURRENT GENERATOR
- The current generator is
composed of D/A converter U36, Serial to parallel con-
verter U37 and voltage reference CR41. The CPU gener-
ates serial data which is converted to parallel information
by U37. CR41 generates a precise voltage which controls
the accuracy of the current generator. The current gener-
ator is made of an operational amplifiers U33 and U35, and
transistors Q67 through Q70. The current is supplied to
the selected capacitor through the collector of Q67.
RANGE CAPACITORS
- Serial data from the CPU is
converted to parallel information by U30 and U38. The
parallel information, through switching transistors Q62,
Q64, Q65, Q60, Q61 Q75 and Q76, is then used for select-
ing the appropriate capacitor from one of C79 through C86
and C106 respectively.
COMPARATOR
- The comparator circuit consists of a
FET buffer Q66, a monolithic comparator U34 and their
associated components. The reference voltage is gener-
ated from the +15V supply by the resistor divider R193 and
R196.
SELECTOR
- The selector circuit U31 selects one of the
pulse, pulse complement or square waveforms. One of
these waveforms are then fed to the pulse shaper.
RAMP AMPLIFIER
- The ramp amplifier is comprised
of operational amplifiers U39 and U40. U41 controls FET
switches Q73 and Q74. These switches select ramp polar-
ity.
Figure 6-7. Pulse Generator Functional Block Diagram.
Theory Of Operation
Model 8020
Page 6-8
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