10
line buffer has been filled. All control characters with the exception of a
carriage return are ignored by the printer. They are not stored in the FIFO line
memory since they cannot be printed anyway. Repeated line feeds are initiated by
sending repeated carriage return control commands. Since the printer prints upper
case ASCII characters only, all lower case characters sent to the printer are
transposed to their upper case equivalent before printing. The printer's line
buffer memory is automatically cleared by a hardware power-up reset circuit when
printer power is first applied. The printer's motor is triac controlled and is
powered by a 120 VAC secondary on the power supply's power transformer. This not
only provides power line isolation but allows the entire unit to be run on either
120 VAC or European 240 VAC power systems since the power transformer has two
primary windings which may be either parallel or series connected.
The seven ASCII parallel data input lines and "data ready" and "data
accepted" control lines are all TTL compatible. The inputs represent a maximum of
two standard TTL loads while the "data accepted" output will drive ten standard
TTL loads. Data is presented to the printer by storing the selected ASCII data on
the seven data input lines and strobing the normally high (logic 1) "data ready"
input line low. This line should go low (logic 0) for at least 1 microsecond and
when it does the normally high "data accepted" will also go low. The character is
not actually loaded until the "data ready" input is returned to its normally high
state. The "data accepted" line will then normally return high as well,
indicating that the character has been loaded. However, when loading the 40th
character on a print line or a carriage return command this "data accepted" line
will not return high until the character data has been printed and the printer
memory is ready for more data. The printer will ignore all data sent to it while
the "data accepted" line is low. So you will usually want to make sure the "data
accepted" output line is high before sending the printer data to be printed.
If you are careful not to output data faster than one character per
microsecond and allow a minimum one second delay before sending data after
sending a carriage return or the 40th character of each line then you may avoid
using the "data accepted" line altogether. However, using the "data accepted"
line will give your system the fastest possible print speed.
How It Works
All ASCII character data is presented to the FIFO memory, IM thru hex
inverter/buffer IC12. NAND gate IC14A makes any necessary conversions from lower
to upper case characters. 8 input NAND gate IC13 monitors the incoming ASCII data
in search of a carriage return (0D16 or 0000 11012) control command. If it
decodes a carriage return it will prepare normally high control flip-flop IC8A to
go low on the falling edge of the "data ready" (input strobe) control signal. NOR
gate IC15A decodes all control characters and along with IC15B inhibits any
control characters from being loaded into the FIFO memory. NAND gate IC9A is
responsible for generating the "data accepted" output whenever data has been
accepted by the FIFO memory or acknowledged by the control character decode
logic. It also inhibits the "data accepted" output while the printer is in the
process of printing a line.
Control flip-flop IC8A's Q output is high when the printer is in the idle
state. A FIFO full signal decoded by NOR gate IC15D or a decoded carriage return
command by IC13 resets this flip-flop low which turns the printer's motor on thru
transistors Q1 and Q2 located on the power supply board which starts a line print
sequence.
When the print head advances to the "start of line" position, the roller
arm microswitch changes states which flips RS latch NAND gate IC11D low which