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Delayline Detector DLD6060-8S Manual | Surface Concept GmbH
4.1.2 Dark Count Rate Measurement
• Check the detector output by means of your end-user software (e.g. GUI software) after ramping to the
operation voltage (the use of the rate meter where available is recommended).
• The dark count rate without any source should be as given in the specification sheet.
• Accumulate the dark counts for several minutes. The DLD image should appear homogeneous and
sharply bounded (see
for an example).
Figure 6: Example for DLD image of accumulated dark counts.
4.1.3 Standard DLD Measurement
Note
• After finishing the dark count rate measurement with a satisfying result, you may now start carefully
with an electron or light source observing the detector output.
Example:
The bias voltage U_Bias should always be set to 0V. Therefore the “CH-B” voltage is only defined
by the Herzog Potential, which must be ramped first (see SPECS Analyzer manual for details). The “CH-HV”
voltage is given in respect to the “CH-B” voltage. A ramp time of about 5min. should be used to change the
“CH-HV” voltage from 0V to a target voltage of exe1800V. The “U_DLD” voltage is given in respect
to the “CH-HV” voltage and should be changed after the “CH-HV” voltage has been set.
The analogue readout electronics has been adjusted to optimized detector voltages.
The starting operation voltages are given in the specification sheet of the detector.
Please note that one cannot compensate a voltage lower than the specified operation
voltages by increasing the intensity to the detector. This will only lead to complete false
measurement results.
It is highly recommended to keep the U_Bias at 0V. Contact your provider before changing
the bias voltage.
Keep in mind the description about the important operation details in
.