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Delayline Detector DLD4040 Manual
DLD4040 R2.55 & R3.54 Manual | Surface Concept GmbH
5 DLD - Principle of Operation
5.1 Basics of Delayline Detection
The delayline detector (DLD) consists of a micro channel plate stack (required to amplify incoming
electrons) and the detector anode. The DLD anode (for 4 quadrant DLDs: each single quadrant) consists
basically of two meander structured delaylines; one rotated by 90° with respect to the other and both
isolated from each other. The electron cloud from the MCP stack output is drawn to the detector anode
by a positive potential difference between anode and back side of MCP stack, where it induces electrical
pulses into the delayline by capacitive coupling. The pulses are traveling to the both ends of the meander
within a time determined by the hitting position.
Each hit position is encoded by a fast data acquisition unit, which also may detect the hit time referenced
to an external clock in repetitive (stroboscopic) experiments.
Figure 6: Schematic drawing of the principle of the 3D (x, y, t) delayline operation.
Delayline detectors are single counting devices; therefore the complete device works linearly even at
extremely low numbers of incoming electrons. The maximum count rate in the fourfold coincidence
measurement is up to a few million counts per second. The exact value depends on the individual DLD
layout (e.g. the size of the active area) and is given within the specification sheet of the DLD.
