Supero X9DR7-LN4F, Руководство пользователя

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Chapter 2: Installation
2-31
DM1
JPG1
JBT1
J2
1
JTPM
1
JIPMB1
FA
NB
FAN4
FAN2 FAN1
JI2C
1
JI2C
2
JBAT1
JSD1
J2
2
JPW2
JPI2C1
JD
1
JF1
X9DR7/E-LN4F
Rev. 1.00
CPU2 SLOT3 PCI-E 3.0 X1
6
L-SAS 4~7
CPU2 SLOT4 PCI-E 3.0 X8 CPU1 SLOT1 PCI-E 3.0 X8
XDP-CPU
CPU1 SLOT2 PCI-E 3.0 X8
I-S
AT
A0
COM2
USB4/5
S-SA
TA
2
S-SA
TA
0
CPU1 SLOT6 PCI-E 3.0 X8
CPU2 SLOT5 PCI-E 3.0 X1
6
L-SAS 0~3
P1 DIMMC
1
P1 DIMMC
2
P1 DIMMD
1
P1 DIMMD
2
P1 DIMMB
2
P1 DIMMB
1
P2 DIMME
1
P2 DIMME2
P1 DIMMA
2
P2 DIMMF
1
P1 DIMMA
1
P2 DIMMF
2
P2 DIMMH
2
P2 DIMMH
1
P2 DIMMG1
P2 DIMMG
2
JPWR
1
LE1
T-SGPIO2
BMC
CTRL
CTRL
LAN
PCH
CTRL
SAS
SP1
FAN3
FANA JF2
JOH
1
JW
D
JSTBY1
JS
7
JS
6
JL
1
JS6
JS
5
S-SA
TA
1
S-SA
TA
3
T-SGPIO1
I-S
AT
A3
I-S
AT
A2
I-S
AT
A1
I-S
AT
A4
I-S
AT
A5
BIOS
SCU-SGPIO1
USB6
J23
J25
JPB1
J3
0
J2
9
JPL1
FAN5
Battery
JPWR
2
LAN2/4 LAN1/3
USB2&3
USB0&1
IPMI_LAN
KB/Mouse
COM1
VGA
FA
N6
JPME
2
JPME1
CPU1
CLOSE 1st
OPEN 1st
CPU2
CLOSE 1st
OPEN 1st
A
B
A.
JPI
2
C1
B. IPMB
Power SMB (I
2
C) Connector
Power System Management Bus (I
2
C)
Connector (JPI
2
C1) monitors power
supply, fan and system temperatures.
See the table on the right for pin
definitions.
PWR SMB
Pin Definitions
Pin# Definition
1 Clock
2 Data
3 PWR Fail
4 Ground
5 +3.3V
IPMB
A System Management Bus header
for IPMI 2.0 is located at JIPMB1.
Connect the appropriate cable here
to use the IPMB I
2
C connection on
your system.
IPMB Header
Pin Definitions
Pin# Definition
1 Data
2 Ground
3 Clock
4 No Connection