Supero Supero C7X99-OCE, Руководство пользователя

Страница: 53 / 147

Chapter 2: Installation
2-23
Internal Buzzer (SP1)
The Internal Buzzer (SP1) can be used
to provide audible indications for various
beep codes. See the table on the right
for pin definitions.
A. Internal Buzzer
B. Speaker Header
Internal Buzzer
Pin Definition
Pin# Definitions
Pin 1 Pos. (+) Beep In
Pin 2 Neg. (-) Alarm
Speaker
Speaker (JD1)
On the JD1 header, Pins 3~4 are used
for internal speaker. Close Pins 3~4 with
a cap to use the onboard speaker. If you
wish to use an external speaker, close
Pins 1~4 with a cable. See the table on
the right for pin definitions.
Speaker Connector
Pin Definitions
Pin Setting Definition
Pins 3~4 Internal Speaker
Pins1~4 External Speaker
MAC CODE
IPMI CODE
BAR CODE
C7X99-OCE-F
SW_BIOSRC
S4
S7
S10
S5
S6
S9
OC_FR
ONT_P
ANEL
S8
S11
CLR_CMOS_SW
JUSB30_I2
JA
UDIO1
LED4
I-SATA0 I-SATA2 I-SATA4 S-SATA0 S-SATA2
AUDIO_FP
JIPMB1
JSD1
MH11
MH2
MH9
MH10
JPW2
C A
LEDM1
JBT1
BT1
+
FAN5
FAN4
FAN1
1
FAN2
4
FAN3
JPL2
JPUSB1
J29 J30
JP
ME2
JPAC1
JPL1
JI2C1 JI2C2
JPB1 JPG1
JWD1
1
JL2
JL1
JD1
1
JF1
2
19
JPI2C1
JSTBY1
JTP
M1
SP1
+
HD AUDIO
VGA
LAN1
LAN2
USB 16/17(3.0)
USB 12/13(3.0)
USB 10/11(3.0)
USB 14/15(3.0)
CPU SL
O
T6 PCI-E 3.0 X16
PCH SL
O
T5 PCI-E 2.0 X1 (IN X4)
CPU SL
O
T4 PCI-E 3.0 X8 (IN X16)
PCH SL
O
T3 PCI-E 2.0 X1 (IN X4)
CPU SL
O
T2 PCI-E 3.0 X8 (IN X16)
CPU SL
O
T1 PCI-E 3.0 X8 (IN X16)
2-3:DISABLE 1-2:ENABLE
:W
AT
CH DOG
SPEAKER PWR LED
:TP
M/POR
T80
CPU
CHASSIS INTRUSION
JI2C2
2-3:DISABLE 1-2:ENABLE JI2C1
PWR ON
OH/FF
NIC1
NIC2
RST
X
CMOS CLEAR
1-2:NORMAL
2-3:BIOS RECOVERY
JBR1
PWR LED
HDD LED
NMI
X
2-3:ME M
ANUF
AC
TURING MODE
JP
ME2
1-2:NORM
AL
1-2 ENABLE
2-3 DISABLE
1-2 ENABLE
2-3 DISABLE
:PWR I2C
1-2 ENABLE 2-3 DISABLE 2-3 DISABLE 1-2 ENABLE
1-2 ENABLE
2-3 DISABLE
JPAC1
VGA
USB14/15 WAKE UP
1-2 RST 2-3 NMI
:SATA DOM POWER
DIMMD2
DIMMD1
DIMMC2
DIMMC1
DIMMB2
DIMMB1
DIMMA2
DIMMA1
JBR1
JWD1
JPW1
JPUSB1
JPB1
JPG1
C
A
LED1
I-SATA1 I-SATA3 I-SATA5 S-SATA1
S-SATA3
C7X99-OCE/
COM1
A
B