Chapter 1: Introduction
1-9
Introduction
1-2
Chipset Overview
The VIA Apollo Pro 266T chipset is a high performance, cost-effective and
energy-efficient chipset for the implementation of AGP/V-Link/PCI/LPC com-
puter systems based on 64-bit, 370-pin Pentium III (66/100/133 MHz FSB)
processors.
VIA's Apollo Pro 266T chipset consists of two major components: the
VT8653 V-Link Memory Host System controller (North Bridge) and the
VT8233 V-Link Client PCI/LPC controller (South Bridge). The VT8653 Host
System Controller provides superior performance between the CPU, DIMMs,
AGP bus and V-Link inferface with pipelined, burst and concurrent opera-
tion. The VT8233 V-Link Client controller is a highly integrated PCI/LPC
controller. Its internal bus structure is based on a 66 MHz PCI bus that
provides a 2x bandwidth. The VT8233 integrated Clint V-Link controller,
which supports a 266 MB bandwidth between the Host/Client V-Link inter-
face, provides a V-Link PCI and V-Link LPC controller. It supports five PCI
slots arbitration and decoding for all integrated functions and an LPC bus.
Memory Support and AGP Capability
The VT8653 supports up to 4 GB of PC1600 and PC2100 DDR-RAM. The
DDR-RAM controller supports both SDRAM and VCSDRAM (Virtual Channel
SDRAM) in a flexible mix/match manner. The SDRAM interface allows for
zero wait state bursting between the DRAM and the data buffers at 66/100/
133 MHz.
The VT8633 Controller also supports full AGP v.2.0 capability for maximum
bus utilization including 2x and 4x mode transfer, SBA (Side Band Address-
ing), Flush/Fence commands and pipelined grants. The VT8633 also pro-
vides flexible CPU/AGP/PCI remapping control, which supports major AGP-
based 3D and DVD multimedia accelerators.
Recovery from AC Power Loss
The BIOS provides a setting that alllows you to determine how the system
will respond when AC power is lost and then restored to the system. You
can choose for the system to remain powered off (in which case you must
press the power switch to turn the system back on) or for it to return
automatically to a power-on state. See the Power Lost Control setting in
the BIOS chapter of this manual to change this setting. The default setting
is "Always OFF."
Содержание SUPER P3TDDR
Страница 1: ...SUPER P3TDDR USER S MANUAL Revision 1 0a SUPER...
Страница 9: ...Chapter 1 Introduction 1 3 Introduction SUPER P3TDDR Figure 1 1 SUPER P3TDDR Image...
Страница 44: ...3 6 SUPER P3TDDR User s Manual Notes...
Страница 69: ...Chapter 4 Award BIOS 4 25 4 9 Exit Setup Select Exit from the Main Menu bar to activate the following screen...
Страница 80: ...SUPER P3TDDR User s Manual B 6 Notes...
Страница 82: ...SUPER P3TDDR User s Manual C 2 Notes...