Supermicro X5DA8, Руководство пользователя

Страница: 25 / 92

Chapter 1: Introduction
1-19
Introduction
1-2 Chipset Overview
The Intel E7505 chipset is a high-performance chipset with a performance
and feature-set designed dual processor servers. The E7505 chipset con-
sists of three major components: the Memory Controller Hub (MCH), the I/O
Controller Hub 4 (ICH4) and the PCI-X 64-bit Hub 2.0 (P64H2).
The MCH has four hub interfaces, one to communicate with the ICH4 and
three for high-speed I/O communications. The MCH employs a 144-bit wide
memory bus for a DDR-266 memory interface, which provides a total band-
width of 4.27 GB/s. The ICH4 interface is a 266 MB/sec point-to-point
connection using an 8-bit wide, 66 MHz base clock at a 4x data transfer
rate. The P64H2 interface is a 1 GB/s point-to-point connection using a 16-
bit wide, 66 MHz base clock at an 8x data transfer rate.
The ICH4 I/O Controller Hub provides various integrated functions, including
a two-channel Ultra ATA/100 bus master IDE controller, USB 2.0 host con-
trollers, an integrated LAN controller, a System Management Bus controller
and an AC'97 compliant interface.
The P64H2 PCI-X Hub provides a 16-bit connection to the MCH for high-
performance IO capability and two independent 64-bit PCI-X interfaces.
1-3 Special Features
BIOS Recovery
The BIOS Recovery function allows you to recover your BIOS image file if
the BIOS flashing procedure fails (see Section 3-3).
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond
when AC power is lost and then restored to the system. You can choose
for the system to remain powered off (in which case you must hit the
power switch to turn it back on) or for it to automatically return to a power-
on state. See the Power Lost Control setting in the Advanced BIOS Setup
section (Peripheral Device Configuration) to change this setting. The de-
fault setting is Always On.