52
Super X11DGQ User's Manual
X11DGQ
REV:1.00
DESIGNED IN USA
IP
MI C
ODE
BAR C
ODE
BIOS LICENSE
JTEMP1
JF1
M.2
JPW4
FAN9
FAN8
JUSB3
JTPM1
JSDCARD1
FAN_PWR1
HDD_PWR1
HDD_PWR2
LE6
FAN_C
TRL
JPSU1
JPSU2
VROC
(JRK1)
JP2
JL1
JSTB
Y1
BT1
JVRM1
JWD1
JP
ME2
LEDM1
LE2
JBT1
I-SGPIO1
JPCIE2
JPCIE1
JSL
O
T6
JPCIE3
JPCIE4
JPCIE5
P2-DIMMF1
P2-DIMMD1
P2-DIMME1
P2-DIMM
A1
P2-DIMMC1
P2-DIMMB1
P1-DIMMF1
P1-DIMMD1
P1-DIMME1
JPW3
JPW2
CPU1/CPU2 SL
O
T5 PCIE 3.0 X16/X16
CPU1 SL
O
T4 PCIE 3.0 X16
CPU1 SL
O
T3 PCIE 3.0 X16
CPU2 SL
O
T2 PCIE 3.0 X16
P1-DIMMC1
P1-DIMM
A1
P1-DIMMB1
JPW1
USB2/3 (3.0)
I-SA
TA3
I-SA
TA2
I-SA
TA0
I-SA
TA1
CPU2 SL
O
T1 PCIE 3.0 X16
1. I-SGPIO1
1
SGPIO Header
The I-SGPIO1 (Serial General Purpose Input/Output) header is used to communicate with
the enclosure management chip on the back panel.
SGPIO Header
Pin Definitions
Pin#
Definition
Pin#
Definition
1
NC
2
NC
3
Ground
4
DATA Out
5
Load
6
Ground
7
Clock
8
NC
NC = No Connection
Содержание X11DGQ
Страница 1: ...USER S MANUAL Revision 1 1b X11DGQ...