Supermicro X11DDW-L, Руководство пользователя

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11
Chapter 1: Introduction
Quick Reference
Notes:
1. See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connec -
tions.
2. " " indicates the location of Pin 1.
3. Jumpers/LED indicators not indicated are used for internal testing only.
4.
To avoid causing interference with other components, please be sure to use an add-on
card that is fully compliant with the PCI-standard on a PCI slot
5. Use only the correct type of onboard CMOS battery as specified by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.
JBMC_DEBUG
SRW1
JSDCARD1
JM2_1
JUIDB1
JP3
FAN5 FAN6
FAN4 FAN3
FAN2 FAN1
JBT1
LE3
LE1
C
A
LEDM1
LE2
JNVI2C1
JIPMB1
JNVI2C2
JPME2 JPME1
T-SGPIO3
BT1 +
JSTBY1
JD1
1
JL1
JP2
JF1
JPWR1
JPWR2
JPI2C1
JPWR3
JTPM1
JRK1
JSXB1_2
JAOM
JSXB1_1
JSXB1_3
BAR CODE
X11DDW-L
REV:1.02
MAC CODE
DESIGNED IN USA
BIOS LICENSE
I-SATA 4~7 I-SATA 0~3 S-SATA 0~3
P1_NVME1
P1_NVME0
P2_NVME1
P2_NVME0
CPU2_POR
T2A
CPU2_POR
T2B
CPU2_POR
T2C
CPU2_POR
T2D
CPU1_POR
T3C
CPU1_POR
T3D
CPU1_POR
T3C
CPU1_POR
T3D
CPU1_POR
T3B
CPU1_POR
T3A
CPU1_POR
T3B
CPU1_POR
T3A
SXB1B:CPU1 PCI-E 3.0 X16 + CPU2 PCI-E 3.0 X16
CPU2_POR
T3
SXB2:CPU2 PCI-E 3.0 X16
USB4/5(3.0)
USB0/1(3.0)
USB2/3
(3.0)
S-SA
TA5
S-SA
TA4
VGA
LAN1 LAN2
X NMI PWR
LED NIC HDD
LED
NIC
2 1
UID
LED PS
FAIL
PWRRST
ON
IPMI_LAN
JWD1 JBR1
C621
10G PHY
BMC
CPU1
CPU2
P2 DIMM D1 P2 DIMM E1 P2 DIMM F1
P2 DIMM C1 P2 DIMM B1 P2
DIMM A1
P1 DIMM F1 P1 DIMM E1 P1 DIMM D1
P1
DIMM A1 P1 DIMM B1 P1 DIMM C1
JPL1
VGA
CPU1+CPU2 PCI-E 3.0 X16
SRW1
JPWR2
JSTBY1
USB4/5
BT1
JBT1
JL1
FAN6
LE3
S-SATA0~3
JM2_1
JTPM1
FAN5 FAN4 FAN3 FAN2 FAN1
JPWR1
JPWR3
LEDM1
S-SATA5
S-SATA4
JPI2C1
JIPMB1
JWD1
JF1
LE2
JD1
IPMI LAN
USB0/1
USB2/3
LAN1
LAN2
JRK1
JPME2
JPME1
LE1
JUIDB1
JNVI2C2
P2_NVME1 (-NT)
P2_NVME0 (-NT)
P1_NVME0 (-NT)
JSDCARD1
P1_NVME1 (-NT)
S-SGPIO2
JBMC DEBUG
JNVI2C2
CPU2 PCI-E 3.0 X16
I-SATA0~3
I-SATA4~7
JP3
JP2
JSXB1_1
JSXB1_3
CPU1
JBR1
CPU2
JPL1