2-30
X10DRW-i/X10DRW-iT Motherboard User’s Manual
S-SGPIO
I-SGPIO2
I-SGPIO1
JIPMB1
SAN MAC
IPMI CODE
JBA
T1
JPWR1
S-SA
TA1
S-SA
TA0
S-SA
TA3
S-SA
TA2
I-SA
TA1
I-SA
TA0
I-SA
TA3
I-SA
TA2
I-SA
TA4
I-SA
TA5
BIOS
LICENSE
JPI2C1
JPWR2
JPWR3
JF1
JL1
JSTBY1
JTPM1
JVRM2
JVRM1
JPME2
JVR1
JWD1
JPG1
JPB1
JI2C1 JI2C2
JPL1
SP1
LED1
LEDM1
JBT1
FANB
FANA
FAN4
FAN3
FAN2
USB4/5(3.0)
AOM CPU1 PCI-E 3.0 X16
CPU1
CPU2
P2-DIMMG1
P2-DIMMH1 P2-DIMMG2
P2-DIMMH2
AL
WA
YS POPULA
TE DIMMx1 FIRST
AL
WA
YS POPULA
TE DIMMx1 FIRST
AL
WA
YS POPULA
TE DIMMx1 FIRST
P1-DIMMA1
P1-DIMMA2
P1-DIMMB1
P1-DIMMD2
P1-DIMMC1 P1-DIMMC2 P1-DIMMD1
P2-DIMMF2
P2-DIMMF1
P2-DIMME2
P2-DIMME1
SXB1C
SXB1B:CPU1 PCI-E 3.0 X16
+ CPU2 PCI-E 3.0 X16
UID-SW
LAN2
LAN1 USB2/3(3.0)USB0/1(3.0)
IPMI_LAN
VGA
COM1
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
IPMI
Flash
BIOS
SXB2:CPU2PCI-E 3.0 X16
SXB1A
LAN
X10DRW-i(T)
Rev. 1.01
PCH
CTRL
LED2
BMC
P1-DIMMB2
FAN1
J35
A
A.
JPI
2
C1
B. JIPMB1
Power SMB (I
2
C) Connector
Power System Management Bus (I
2
C)
connector (JPI
2
C1) monitors power
supply, fan and system temperatures.
See the table on the right for pin
definitions.
PWR SMB
Pin Definitions
Pin# Definition
1
Clock
2
Data
3
PMBUS_Alert
4
Ground
5
+3.3V
IPMB
A System Management Bus header
for IPMI 2.0 is located at JIPMB1.
Connect the appropriate cable here
to use the IPMB I
2
C connection on
your system.
IPMB Header
Pin Definitions
Pin# Definition
1
Data
2
Ground
3
Clock
4
No Connection
B
Содержание SUPERO X10DRW-i
Страница 1: ...USER S MANUAL Revision 1 0 X10DRW i X10DRW iT...
Страница 24: ...1 16 X10DRW i X10DRW iT Motherboard User s Manual Notes...
Страница 37: ...Chapter 2 Installation 2 13 Populating DDR4 RDIMM LRDIMM ECC Memory Modules Speed MT s Voltage V...
Страница 64: ...2 40 X10DRW i X10DRW iT Motherboard User s Manual Notes...
Страница 114: ...4 42 X10DRW i X10DRW iT Motherboard User s Manual Notes...
Страница 116: ...A 2 X10DRW i X10DRW iT Motherboard User s Manual Notes...