13
Chapter 1: Introduction
Figure 1-5. Motherboard Layout
1.3 Motherboard Layout
Below is a layout of the B12DPE-6 motherboard with jumper, connector and LED locations
shown. See the table on the following page for descriptions. For detailed descriptions, pinout
information and jumper settings, refer to
or the
JTPM1
CPU1 PCI-E 4.0 X16
BA
TTER
Y
CPU1
P1-DIMMH2 P1-DIMMH1 P1-DIMME2 P1-DIMME1
P1-DIMMG2 P1-DIMMG1
P1-DIMMF2 P1-DIMMF1
CPU1
P1-DIMMA1
P1-DIMMB1 P1-DIMMB2
P1-DIMMC1
P1-DIMMA2 P1-DIMMD1 P1-DIMMD2
CPU1
P1-DIMMC2
REV:1.00A
B12DPE-6
BAR CODE
P2-DIMMC2 P2-DIMMC1 P2-DIMMD2
CPU2
P2-DIMMD1 P2-DIMMA2 P2-DIMMA1 P2-DIMMB2 P2-DIMMB1
P2-DIMME1
P2-DIMMH1
P2-DIMME2
P2-DIMMF2
P2-DIMMF1
P2-DIMMG2
P2-DIMMG1
P2-DIMMH2
CPU2
MP1
JMEZZ1
PWR1
PWR2
BT1
J33
JBT1
LEDM1
CPLD1
MAC CODE
JRK1
BIOS
PCH
LAN
Controller
BMC
BMC Flash
CPLD Flash
CPLD
Dual Boot
VROC
CPU2
JPM1
BMC
P2-DIMMF1
JPME1
BT1 (Battery)
LEDM1
CPLD1
PWR2
MP1
JMEZZ1
JTPM1
JBT1
P2-DIMMD1
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMH1
P2-DIMMH2
P2-DIMMG1
P2-DIMMG2
P1-DIMMD1
P1-DIMMD2
P1-DIMMC1
P1-DIMMC2
P1-DIMMB1
P1-DIMMB2
P1-DIMMA1
P1-DIMMA2
P2-DIMMD2
P2-DIMMC1
P2-DIMMC2
P2-DIMMB1
P2-DIMMB2
P2-DIMMA1
P2-DIMMA2
P1DIMMF1
P1DIMMF2
P1DIMME1
P1DIMME2
P1DIMMH1
P1DIMMH2
P1DIMMG1
P1DIMMG2
LAN Controller
PCH
PWR1
BIOS
JRK1
Dual Boot
for CPLD
BMC
Flash
CPLD Flash
CPU1 PCI-E
4.0x16
(Reserved)