2-12
PDSML-LN1+/PDSML-LN2+/PDSML-E+ User's Manual
Power Button
The Power Button connection is
located on pins 1 and 2 of JF1. Mo-
mentarily contacting both pins will
power on/off the system. This button
can also be configured to function
as a suspend button (with a setting
in BIOS - see Chapter 4). To turn
off the power when set to suspend
mode, press the button for at least
4 seconds. Refer to the table on the
right for pin definitions.
Power Button
Pin Definitions (JF1)
Pin# Definition
1
Signal
2
+3V Standby
Power Button
OH/Fan Fail LED
1
NIC1 LED
Reset Button
2
HDD LED
Power LED
Reset
PWR
Vcc
Vcc
Vcc
Vcc
Ground
Ground
19
20
Vcc
X
Ground
NMI
X
Vcc
PWR Fail LED
NIC2 LED
A
B
Reset Button
The Reset Button connection is lo-
cated on pins 3 and 4 of JF1. Attach
it to the hardware reset switch on the
computer case. Refer to the table on
the right for pin definitions.
Reset Button
Pin Definitions (JF1)
Pin# Definition
3
Reset
4
Ground
A. Reset Button
B. PWR Button
S
UPER PDSML-LN1+/LN2+/E+
®
LGA 775
CPU
KB/MS
JLAN1
Intel
3000/3010
North Bridge
4n
aF
24-Pin ATX PWR
ICH7R
South Bridge
8-pin PWR
Battery
USB 1/2
V
G
A
JLAN2
COM2
Floppy
DIMM 2B
PCI-E x8
BIOS
ID
E
JPF
DIMM 1B
DIMM 2A
DIMM 1A
Fan1
J 8
Fa
n5
LAN
CTRL2
JP
L2
JP
L1
WOL
JWOR
re
zz
uB
JL1
JI
2
C1
JBT1
SATA1
JPG1
Fan3
FP
C
TR
L
JF1
Fan2
USB3/4
LAN
CTRL1
SPKR
JI
2
C2
IPMI
Slot6
SBX: PCI-33 MHz
VGA
CTRL
J10
PCI-E x4
Slot5
PCI1
Slot4
PCI-33 MHz
LE
3
CO
M
1
VGA
Memory
LE
4
LE
1
JL
E
D
Fan6
CPU
Fan
JP
R
1
PWR Fault
PWR SMB
(*LN2+)
(*LN2+)
USB5/6
SATA0 SATA2
SATA3
S I/O
Содержание PDSML-E+
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