52
A+ Server AS -2013S-C0R User's Manual
4.3 Ports
Rear I/O Ports
See the figure below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.
Figure 4-1. I/O Port Locations and Definitions
JUIDB2
JPW1
SAS CODE
MAC CODE
IPMI CODE
BIOS LICENSE
DESIGNED IN USA
H11SS
L-i
BAR CODE
JI2C_FP1
JNCSI1
JP
I2C1
SP1
JLAN1
JLAN2
LEDSAS
A
C
JUSB3
1
19
10
11
JT
PM1
JSD2
1
JSD1
1
3
JVR
M1
JPL2
JPG1
JPB1
3
JWD1
JBR2
JPL1
JPSAS1
JPS1
JCOM1
JF1
1
FAN5
FAN4
FAN3
FAN2
FAN1
FANA
1
JOH1
BT2
+
TP3
JVGA1
LED1
LE
1
A
LEDM1
LE3
JBT1
JSD
CARD1
JI2C_EXP1
JSEN1
MH16
MH15
JP
WR2
1
JPWR1
JPCIE5
JPCIE1
J23
JPCIE6
JPCIE4
I-SATA6
7
I-S
ATA7
I-SATA5
I-S
ATA4
I-SATA3
I-SATA2
I-S
ATA1
1
I-S
ATA0
MH
7
MH6
MH2
JNVME1
PRESS FIT
JNVME0
PRESS FIT
JSAS1
PRESS FIT
DS1
CPU
1-2:Enable SAS HDD
Sta
tus Suppo
rt(
Default)
2-3:Disable SAS HDD
Sta
tus Suppo
rt
JPSAS1
SATA12~15
SATA8~11
SA
TA
DOM
+
POWE
R
SA
TA
DOM
+
POWE
R
JF1
UID-LED
JVRM1
2-3 DISABLE
1-2 ENABLE
OH
RST
PWR
ON
FAI
L PS
NI
C
LE
D
UID
2
NI
C
1
LE
D
PWR
LE
D
HDD
NM
I
X
L-SAS0-7
BA
TTE
RY
JBT1:CMOS CLEAR
TP
M/PO
RT80
PWRI2C
JL1:CHASSIS INTRUSION
SATA DOM POWER
SATA DOM POWER
SP
EAKER-P
IN 4-7
PWR LE
D-PI
N 1-3
JD1
:
2-3:BIOS RE
CO
VE
RY
1-2:NOR
M
AL
JBR1
JWD1:
W
AT
CH DOG
2-3:NMI 1-2:RST
1-2:Enable LSI SAS3008(Default)
2-3:Disable LSI SAS3008
JPS1
CPU S
LO
T1 PCI-E 3.0 X8
CPU S
LO
T2 PCI-E 3.0 X16
CPU S
LO
T3 PCI-E 3.0 X8
CPU S
LO
T4 PCI-E 3.0 X16
CPU S
LO
T5 PCI-E 3.0 X8
CPU S
LO
T6 PCI-E 3.0 X16
JPL2:LAN2
2-3 DISABLE
1-2 ENABLE
JPL1:LAN1
2-3 DISABLE
1-2 ENABLE
UID-SW
VGA
LAN2
LAN1
(3.0)
USB 4/5
IPMI_LAN
USB 0/1
JPB1:BMC
2-3 DISABLE
1-2 ENABLE
1-2 ENABLE JPG1:VGA
2-3 DISABLE
SD_
CARD
COM1
P1-DIMMD1 P1-DIMMC1 P1-DIMMB1 P1-DIM
M
A1
P1-DIMME1 P1-DIMMF1 P1-DIMMG1 P1-DIMMH1
CPU
USB6/7(3.0)
1
7
J25
USB2/3
JUSBA1
USB8(3.
0)
JSTBY1
1
5
4
3
2
6
7
8
9
10
Rear I/O Ports
# Description
#
Description
#
Description
1
COM Port
5
USB 4 (3.0)
9
VGA Port
2
IPMI LAN Port
6
USB 5 (3.0)
10
UID Switch & UID LED
3
USB 0 (2.0)
7
LAN Port #1
4
USB 1 (2.0)
8
LAN Port #2
