Sun Microsystems Ultra 5, Руководство по обслуживанию

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Appendix C Functional Description C-13
C.1.3.3 Memory Address Assignment
The system memory spans a 1-Gbyte region, starting at physical address
0x000.0000.0000. The system has four DIMM sockets that accept 16-Mbyte to 256-
Mbyte DIMMs. DIMMs must be installed in pairs. If the same size pair of DIMMs
are not installed, software configures them to the lower size DIMM. Address
mapped to memory must be cacheable. Transfers between any port and memory is
done in 64-byte cache line size. Non-cacheable accesses to memory are not
supported and are treated as an error. Parameters that effect the address assignment
of each DIMM module are DIMM size and in which bank (bank 0 or bank 1) the
DIMM is installed.
PA[28:27]
are used as the DIMM-pair select.
PA[29]
is used as an upper stack or
a lower stack select; 0 is bottom stack and 1 is the upper stack. DIMMs that contain
a single bottom stack must have
PA[29]
set to 0 (lo) to be accessed. The way that
PA[29:27]
maps into RASx_L is listed in the following table.
TABLE C-4
lists the
memory address range based on installed DIMMs.
TABLE C-3
PA Map Into RASx_L Signals
PA[29:27] RASx_L Asserted PA[29:27] RASx_L Asserted
000 RASB_L[0] 100 RAST_L[0]
010 RASB)L[2] 110 RAST_L[2]
TABLE C-4
Memory Address Range Based on Installed DIMMs
DIMM Bank
Number
DIMM Size DIMM Pair Size Address Range Notes
0 16 Mbyte 32 Mbyte 0x0000.0000 -
0x01FF.FFFF
0 32 Mbyte 64 Mbyte 0x0000.0000 -
0x03FF.FFFF
0 64 Mbyte 128 Mbyte 0x0000.0000 -
0x07FF.FFFF
0 128 Mbyte 256 Mbyte 0x0000.0000
0x0FFF.FFFF
0 256 Mbyte 512 Mbyte 0x2000.0000 -
0x2FFF.FFFF
1 16 Mbyte 32 Mbyte 0x1000.0000 -
0x11FF.FFFF
1 32 Mbyte 64 Mbyte 0x1000.0000 -
0x13FF.FFFF