STMicroelectronics STM32L152D-EVAL, Руководство пользователя

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Connectors UM1521
30/56 Doc ID 022868 Rev 1
3.5 LCD glass daughterboard connectors CN6 and CN7
Two 48-pin male headers CN6 and CN7 connect the LCD glass daughterboard (MB979).
GPIOs which act as LCD glass signals and are not on CN5 and CN10 are available on these
two connectors. The space between these two connectors and the position of every LCD
glass signal is defined as a standard which allows development of common daughterboards
for several evaluation boards. The standard width between the CN7 pin1 and CN6 pin1 is
700 mils (17.78 mm).
GPIO signals on these two connectors can be tested on odd pins when the LCD glass board
is absent. Signal assignments are detailed in
Table 24 .
Note: If CN6 and CN7 are used as GPIO extension connector on a common daughterboard, do
not connect odd pins and even pins directly onto the daughterboard, and leave Trace
connector (CN11), JTAG connector (CN16) and JP2 open.
Table 24. LCD glass daughterboard connectors CN6 and CN7
CN7 CN6
Odd pin GPIO signal Odd pin GPIO signal
1 PA9 1 PD2
3 PA8 3 PC12
5 PA10 5 PC11
7 PB9 7 PC10
9 PB11 9 PC3
11 PB10 11 PC4
13 PB5 13 PC5
15 PB14 15 PC6
17 PB13 17 PC7
19 PB12 19 PC8
21 PA15 21 PC9
23 PB8 23 PD8
25 PB15 25 PD9
27 PC2 27 PD10
29 PC1 29 PD11
31 PC0 31 PD12
33 PA3 33 PD13
35 PA2 35 PD14
37 PB0 37 PD15
39 PA7 39 PE0
41 PA6 41 PE1
43 PB4 43 PE2
45 PB3 45 PE3
47 PB1 47 PA1
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