DocID018909 Rev 11
RM0090
Flexible static memory controller (FSMC)
1588
Figure 442. Mode C write accesses
The differences compared with mode1 are the toggling of NOE and the independent read
and write timings.
Table 229. FSMC_BCRx bit fields
Bit No.
Bit name
Value to set
31-20
Reserved
0x000
19
CBURSTRW
0x0 (no effect on asynchronous mode)
18:16
CPSIZE
0x0 (no effect on asynchronous mode)
15
ASYNCWAIT
Set to 1 if the memory supports this feature. Otherwise keep
at 0.
14 EXTMOD
0x1
13
WAITEN
0x0 (no effect on asynchronous mode)
12
WREN
As needed
11
WAITCFG
Don’t care
10
WRAPMOD
0x0
9
WAITPOL
Meaningful only if bit 15 is 1
8 BURSTEN
0x0
7 Reserved
0x1
6 FACCEN
0x1
5-4 MWID
As
needed
3-2
MTYP[0:1]
0x2 (NOR Flash memory)
A[25:0]
NOE
ADD
S
ET
(DATA
S
T + 1)
Memory tr
a
n
sa
ction
NEx
D[15:0]
HCLK cycle
s
HCLK cycle
s
NWE
NADV
d
a
t
a
driven by F
S
MC
a
i15565
1HCLK