8
Schematics
Figure 12.
Power and decoupling
5.0V_SR
1.25V_SR
3.3V_SR
5.0V_LR
VDD_HV_IO_MAIN
3.3V_SR
5.0V_SR 1.25V_SR
VDD_HV_PMU_OSC
GND
GND
GND
GND
GND
GND
GND
GND
NOT MOUNTED
NOT MOUNTED
1-2 CLOSED
DEFAULT
1-2 CLOSED
DEFAULT
1-2 CLOSED
DEFAULT
RING -HEADED FOR PROBE HOOK
default CLOSE
1
2
3
4
1437671-6
J2
TEST2
GT1
TEST2
GT2
TEST2
GT3
TEST2
GT4
TEST2
10R
GT5
1/10W
0805
R1
2
1
3
J3
STRIP3PM
2
1
3
J5
STRIP3PM
2
1
3
J6
STRIP3PM
0603
100nF
50V
X7R
C2
0603
1nF
100V
X7R
C3
0603
100nF
50V
X7R
C5
0603
100V
X7R
C6
1nF DNP
0603
100nF
50V
X7R
C8
0603
1nF
100V
X7R
C9
0603
100nF
50V
X7R
C10
0603
100nF
50V
X7R
C13
0603
100nF
50V
X7R
C16
0603
100nF
50V
X7R
C26
0805
16V
X7R
2.2uF DNP
0603
C28
100nF
50V
X7R
0805
C29
16V
X7R
2.2uF DNP
C31
0603
100nF
50V
X7R
C32
GND
VDD_HV_ADC_TSENS
VREFH_ADC
default CLOSE
default CLOSE
VDD_LV1
VDD_LV2
VDD_LV3
GND
1-2 CLOSED
DEFAULT
2
1
3
J1
STRIP3PM
5.0V_LR
VDD_HV_PMU_OSC
0805
VDD_HV_IO_MAIN
16V
2.2uF
X7R
0805
C12
2.2uF
16V
X7R
C23
0805
16V
2.2uF
X7R
C24
ADC
OSC & JTAG (3.3V or 5V )
I/O (3.3v - 5V)
SPC570SADPT64S
Power Pins
VREFH_ADC
19
VDD_HV_IO_W0
13
VDD_HV_ADC_TSENS
25
VDD_HV_PMU_OSC
37
VDD_HV_IO_E0
33
VDD_HV_IO_E1
46
VDD_LV_W0
12
VDD_LV_E0
34
VDD_LV_E1
45
VDD_HV_IO_N0
54
VDD_HV_IO_N1
61
MCU CORE LOGIC
65
EPAD
( 1.25V )
DUT1A
VELVETY-eTQ FP64
GND
0603
100nF
50V
X7R
C19
0805
2.2uF
16V
X7R
C22
GND
0603
100nF
50V
X7R
0603
C15
1nF
100V
X7R
0805
C18
16V
2.2uF
X7R
C21
0805
470nF
50V
X7R
C4
0805
1uF
50V
X7R
C1
0603
100V
X7R
1nF DNP
0603
C17
100V
X7R
1nF DNP
0603
C14
100V
X7R
1nF DNP
0603
C11
100V
X7R
1nF DNP
C20
PIN 13
0805
16V
X7R
C7
2.2uF DNP
NOT
NOT MOUNTED
NOT
MOUNTED
NOT
MOUNTED
NOT
MOUNTED
MOUNTED
JP1
default OPEN
0603
100V
X7R
1nF DNP
0603
C27
100V
X7R
1nF DNP
0603
C30
100V
X7R
1nF DNP
C33
NOT MOUNTED
NOT MOUNTED
0805
NOT MOUNTED
2.2uF
16V
X7R
C25
JP2
JP4
JP5
NOT MOUNTED
CLOSE TO
GND
PLACE NEAR RELATIVE DECOUPLING
GND
UM2841
-
Rev 1
page 20/28
UM2841
Schematics