5.3
SPI NOR Flash memory (U1)
5.3.1
Description
The 64-Mbit SPI NOR Flash memory is connected to a second SPI interface (SPIB) of the STM32 device and
can be used to store graphic objects. The use of a second SPI ensures optimum data transfer between the Flash
memory and the LCD display.
In the case of the X-NUCLEO-GFX01M2 expansion board, for the Nucleo-64 boards that only support one single
SPI, the Flash memory shares the same SPI as the LCD. Solder bridges are used to implement these two
configurations as shown in
.
Table 4.
X-NUCLEO-GFX01M2 SPI configuration
Interface
SPI
Solder bridge ON
Solder bridge OFF
Flash memory SPI
SB4, SB5, SB6
SPIA (shared with the LCD)
SB1, SB2, SB3
SB4, SB5, SB6
1. The default dual-SPI configuration is shown in bold.
5.3.2
Operating voltage
The NOR Flash memory is designed to operate only with a 3.3 V SPI interface.
5.3.3
I/O interface
Table 5.
X-NUCLEO-GFX01M1 I/O configuration of the NOR Flash memory
Pin number
Pin name
Signal name
STM32 GPIO
Function
1
CS#
SPIB_NCS_PB9_PB7
SPI chip select active high
2
SO
SPIB_MISO_PC2_PA6
PC2
PA6
SPI master in/slave out
3
WP#
-
-
Write protection feature disabled
4
GND
GND
-
Ground
5
SI
SPIB_MOSI_PC3_PA12
PC3
PA12
SPI master out/slave in
6
SCLK
SPIB_SCK_PB13_PA5
PB13
PA5
SPI serial clock
7
HOLD#
-
-
Pause feature disabled
8
VCC
3V3
-
3.3 V power supply
1. STM32 GPIO for
,
,
,
,
,
,
2. STM32 GPIO for
,
UM2750
SPI NOR Flash memory (U1)
UM2750
-
Rev 2
page 11/31