UM2163
Hardware
layout and configuration
DocID030224 Rev 1
19/30
•
noise blocking diodes
•
high-power P-channel and N-channel MOSFETs as output stages for each channel
•
clamping-to-ground circuitry
•
anti-leakage
•
anti-memory effect block
•
a thermal sensor
•
an HV receiver switch (HVR_SW), which guarantees strong decoupling during the
transmission phase
•
self-biasing and thermal shutdown blocks (see
Figure 15: "STHV748S single channel
block diagram"
)
Each channel can support up to five active output levels with two half bridges. Each
channel output stage is able to provide a ±2 A peak output current; to reduce power
dissipation during continuous wave mode, the peak current is limited to 0.6 A (a dedicated
half bridge is used).
For further information, please refer to the STHV748S datasheet.
Figure 15: STHV748S single channel block diagram
STHV748S output waveforms can be directly displayed for each channel Ch A/B/C/D using
an oscilloscope by connecting the scope probe to the XDCRA, XDCRB, XDCRC and
XDCRD SMB connectors. Moreover, pulser outputs are connected to the onboard
equivalent load, a 270 pF 200 V capacitor paralleled with a 100 Ω, 2 W resistor. A coaxial
cable can also be used to easily connect the user transducer; in this case, the equivalent
load should be removed from the board. Furthermore, four low voltage outputs are
available to receive the echo signal coming from the piezo-element through HVR_SW
(LVOUTA, LVOUTB, LVOUTC, LVOUTD).
Содержание UM2163
Страница 17: ...UM2163 Hardware layout and configuration DocID030224 Rev 1 17 30 Figure 13 Program 4...
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Страница 27: ...UM2163 PCB layout DocID030224 Rev 1 27 30 Figure 25 Inner layer 2 Figure 26 Inner layer 3...
Страница 28: ...PCB layout UM2163 28 30 DocID030224 Rev 1 Figure 27 Inner layer 4 Figure 28 Bottom layer...