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AN1290
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STMicroelectronics Confidential
synchronized to horizontal components in frequency and phase, like those in SMPS, B+
DC/DC converters, PWM DACs, etc.
— The ground track should enter the IC area through pin 27, then go to the various ground pins
(7, 21, which are not connected internally) and to the H- and V-related components and to
no other place.
●
A monitor chassis normally includes several switching circuits, like SMPS, B+ DC/DC
converter.... The high dI/dt value in some wirings of these circuits will induce parasitic voltages
in all neighboring loops. Do not neglect some medium power circuits, like B+ converter gate
drive: even with a low current, the dI/dt value may be high. This will result in a localized jitter
(i.e. only taking place with certain specific settings of the H-position, H-size, brightness, etc.).
●
A decoupling capacitor and its connecting tracks constitute a loop where the high dI/dt value
induces voltages. Same for oscillator capacitor Co. These parasitic voltages appear in series
with the capacitor and induce jitter; they will be minimized if the loop (IC pin-capacitor-IC
ground) presents the smallest possible area. The loops that include resistors are less critical.
(Nevertheless, it is advisable to keep the connection to R
0
as short and small as possible to
minimize parasitic capacitance on pin 8).
●
The loops emitting parasites obviously should be as small and remote as possible. (SMPS,
DC/DC converter, etc.)
A standard filter for PLL1 (pin 9) includes:
●
10nF to ground;
●
in parallel, the series combination of 1.8k
Ω
and 4.7µF electrolytic.
4.2.2
Output Stage
The output stage is a NPN transistor, the collector of which is available on pin 26. It becomes
conductive when the H scanning transistor is to be switched ON. Pin 26 must be tied to the supply
through a pull-up resistor. With a 30mA sink capability, it can control a bipolar driver.
Most often, “reverse” control is used, with a driver stage as shown in
(A MOS driver is shown. For an application with a bipolar driver, refer to Evaluation Board booklet).
The following points have to be considered:
Figure 4: Driver Stage with MOSFET
H scanning
transistor
Transformer
supply
Driver supply
IC supply
26
27
