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Table 41 describes the hardware configuration for the ADC/DAC interface.
Table 41. CN8 ADC/DAC interface and connector pinout
I/O Hardware Setting
(1)
Configuration
PA4 SB16
ON PA4 is used as ADC/DAC and connected to CN8 pin 1
OFF
PA4 is not used as ADC/DAC
PA4 can be used for STMod+ or motor control
VREFP JP18
ON VDDA on VREFP used as ADC/DAC power supply reference
OFF
ADC/DAC not powered. External power supply reference can be applied to JP18
pin 2
1. The default configuration is shown in bold.
Table 42 describes the jumper configuration for ADC/DAC interface.
Table 42. CN8 ADC/DAC interface and connector pinout
Connector pin
number
STM32 pin Board function
1 PA4 ADC/DAC for test purpose
2 GND GND reference
7.21.3 I/O restriction to other features
Caution: Due to the sharing of some I/Os of STM32U575AII6Q by multiple peripherals, the following limitations apply in
using the ADC/DAC features:
•
ADC/DAC cannot be operated simultaneously with STMod+ SPI_NSS function.
• ADC/DAC cannot be operated simultaneously with the motor
‑
control function.
7.22 SRAM device
7.22.1 Description
A 16-Mbit static RAM (SRAM), 1 M x16 bit, is fitted on the STM32U575I-EV Evaluation board in the U12 position.
7.22.2 Operating voltage
The SRAM is only functional in the voltage range from 2.4 to 3.6 V, according to the SRAM datasheet. This SRAM
does not support the 1.8 V MCU low voltage.
7.22.3 SRAM interface
The STM32U575I-EV Evaluation board and the FMC addressing capabilities handle hosting SRAM devices up
to 32 Mbytes. This is the reason why the schematic of the STM32U575I-EV Evaluation board mentions several
SRAM devices, but by default, the STM32U575I-EV Evaluation board is assembled with a 16
‑
Mbit SRAM.
The SRAM device is attached to the 16-bit data bus and accessed with FMC. The base address is
0x6000
0000
, corresponding to NOR/SRAM1 bank1. The SRAM device is selected with the FMC_NE1 chip select.
FMC_NBL0 and FMC_NBL1 signals allow selecting 8
‑
bit and 16
‑
bit data word operating modes.
Table 43 describes the hardware configuration for the SRAM interface.
STM32U575I-EV
SRAM device
UM2854 - Rev 1
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