ST STM32U575I-EV, Руководство пользователя, Страница: 38 / 105

Table 21 and Table 22 describe the hardware configuration for the MEMS ADF1 interface.
Table 21. Hardware I/O configuration for the ADF1 interface
I/O
Solder
bridge
Setting
(1)
Configuration
PB3 SB115
ON PB3 is used as ADF1_CCK0 to interface the audio MEMS
OFF PB3 is not used for the audio MEMS, it can be used for JTAG JTDO/SWO
PB4 SB26
ON PB4 is used as ADF1_SDIN0 to interface the audio MEMS.
OFF
PB4 is not used for the audio MEMS, it can be used for JTAG JTRSTN,
comparator, or STMod+
1. The default configuration is shown in bold.
Table 22. SW3 configuration for the ADF-MEMS interface
Switch Setting (1) Configuration
SW3-1
OFF ADF1_CCK0 and ADF SDIN0 interface the audio MEMS U48
ON ADF1_CCK0 and ADF SDIN0 interface the audio MEMS daughterboard on CN29
SW3-2
OFF
MDF1_CCK0 and MDF SDIN0 interface the audio MEMS daughterboard on CN29
If SW3-1 is also ON at the same time, MDF1 and AD1 are connected for debugging purposes.
ON N/A
1. The default configuration is shown in bold.
7.12.5 Headphones outputs
The STM32U575I-EV Evaluation board can drive stereo headphones. The STM32U575AII6Q sends up the stereo
audio channels, via its SAI1 TDM port, to the codec device. The codec device converts the digital audio stream to
stereo analog signals. It then boosts them for direct drive of headphones connecting to CN27 3.5 mm stereo jack
receptacles on the board.
The audio codec is set by an I
2
C
‑
bus. The address is a 7
‑
bit address, with an additional bit to read or write (HIGH
to read, LOW to write). The AD0 pin connected to GND gives the least significant bit of the address. The address
of the audio codec is
0b1001010x
. The hexadecimal code is
0x94
to write, and
0x95
to read.
Caution:
The audio codec I
2
C interface is compatible with the I
2
C clock at 100 kHz only.
7.12.6 Audio jack connector
Figure 21 shows the CN27 audio jack connector.
Figure 21. CN27 audio jack connector
STM32U575I-EV
Audio
UM2854 - Rev 1
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