DocID030511 Rev 1
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UM2198
Hardware layout and configuration
68
Note:
For Ethernet clock and jumper JP5 configuration refer to
Section 8.15
.
8.6 Reset
sources
The reset signal of STM32H743I-EVAL Evaluation board is low active and the reset sources
include:
•
Reset button B1
•
Debugging tools from JTAG/SWD connector CN9 and ETM trace connector CN8
•
Daughterboard from CN6
•
Embedded ST-LINK/V2-1
•
RS232 connector CN2 for ISP.
Note:
The jumper JP6 has to be closed for RESET handled by pin 8 of RS232 connector CN2
(CTS signal).
8.7 Boot
option
The STM32H743I-EVAL Evaluation board can boot from:
•
Embedded user Flash
•
System memory with boot loader for ISP
•
Embedded SRAM for debugging
The boot option is configured by setting the switch SW1 (BOOT) and
the
boot base address
programmed in the BOOT_ADD0 and BOOT_ADD1 option bytes. The BOOT can be
configured also through the RS232 connector CN2.
Table 4. 25-MHz crystal X1 related solder bridges
Solder bridge
Description
SB39
PH0 is connected to 25-MHz crystal when SB39 is open (Default setting).
PH0 is connected to extension connector CN6 when SB39 is closed. In such case
R15 must be removed to avoid disturbance due to the 25-MHz quartz.
SB40
PH1 is connected to 25-MHz crystal when SB40 is open (Default setting).
PH1 is connected to extension connector CN6 when SB40 is closed. In such case
R16 must be removed to avoid disturbance due to the 25-MHz quartz.
Table 5. 32 KHz crystal X2 related solder bridges
Solder
bridge
Description
SB1
PC14 is connected to 32-KHz crystal when SB1 is open (Default setting).
PC14 is connected to extension connector CN7 when SB1 is closed. In such case
R18 must be removed to avoid disturbance due to the 32-Khz quartz.
SB4
PC15 is connected to 32-KHz crystal when SB4 is open (Default setting).
PC15 is connected to extension connector CN7 when SB4 is closed. In such case
R17 must be removed to avoid disturbance due to the 32-Khz quartz.
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