ST SPC58XXADPT176S, Руководство пользователя, Страница: 13 / 28

Jumper Description Default Position
J31
PH[11]/EVTO connection to QSH motherboard
connectors
Not mounted Figure 1. SPC58XXADPT176S Rev. B - A2
J38
Device pin 153 EXTREG_SEL function configuration:
•
2-1 Reserved for ST
• 2-3 ENABLED BALLAST
• 2-4 DISABLE BALLAST
2-4
(DISABLE BALLAST)
Figure 1. SPC58XXADPT176S Rev. B - B2
J39
Supply for BALLAST circuit configuration
•
1-2 VDD_HV_IO_MAIN
• 2-3 5.0V_SR
1-2 (VDD_HV_IO_MAIN) Figure 1. SPC58XXADPT176S Rev. B - A2
J40
VDD_LV voltage configuration:
•
2-1 (BALLAST circuit)
• 2-3 (1.25V_SR)
• 2-4 (SMPS regulator module)
2-3 (1.25V_SR) Figure 1. SPC58XXADPT176S Rev. B - A3
J41
JTAG/LFAST LVDS pin 9 configuration
•
1-2: EVTO
• 2-3: ESR0
1-2
(EVTO)
Figure 1. SPC58XXADPT176S Rev. B - A3
J42
JTAG/LFAST LVDS pin 10 configuration
•
1-2: PORST
• 2-3: ESR0
1-2
(PORST)
Figure 1. SPC58XXADPT176S Rev. B - A3
J43
Device pin 155 VDD_HV_FLA voltage configuration:
•
OPEN - disconnect VDD_HV_FLA from
VDD_HV_IO_MAIN
• CLOSED - connect VDD_HV_FLA from
VDD_HV_IO_MAIN
Closed
(connect pin 155
VDD_HV_FLA to
VDD_HV_IO_MAIN)
Figure 1. SPC58XXADPT176S Rev. B - B2
J44
Device pin 10 port configuration / function
configuration
•
1-2 PL8
• 2-3 VDD_LV_BD
1-2
(connect pin 10 to PL 8)
Figure 1. SPC58XXADPT176S Rev. B - B4
J45
Device pin 154 function configuration
•
OPEN - disconnect BCTRL with ballast circuit
• CLOSED - connect BCTRL with ballast circuit
Closed
(connect BCTRL with
BALLAST circuit)
Figure 1. SPC58XXADPT176S Rev. B - A3
J46
Device pin 79 configuration (SUPPLY/GPIO)
•
1-2 pin 79 configured as GPIO (PB10)
• 2-3 VDD_LV_BD (1.25V_SR)
1-2 (PB10) Figure 1. SPC58XXADPT176S Rev. B - C2
J47
Device pin 59 configuration (SUPPLY/GPIO)
•
1-2 pin 59 configured as GPIO (PE15)
• 2-3 pin 59 configured as supply
(VDD_HV_IO_MAIN)
1-2 (PE15) Figure 1. SPC58XXADPT176S Rev. B - C4
SW1 Reset push button Open Figure 1. SPC58XXADPT176S Rev. B - D1
UM2723
Jumpers
UM2723 - Rev 1
page 13/28