ST QFN20, Руководство пользователя, Страница: 15 / 35

Introduction STCF03
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7.3 I²C bus interface
Data transmission from the main µP STCF03 and vice versa takes place through the 2 wires
I²C bus interface wires, consisting of the two lines SDA and SCL (pull-up resistors to a
positive supply voltage must be externally connected). The recommended maximum voltage
of these signals should be 3.0 V.
7.4 Data validity
As shown in Figure 5 , the data on the SDA line must be stable during the high period of the
clock. The HIGH and LOW state of the data line can only change when the clock signal on
the SCL line is LOW.
7.5 Start and stop conditions
Both DATA and CLOCK lines remain HIGH when the bus is not busy. As shown in Figure 6 a
start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. A STOP condition
must be sent before each START condition
Figure 5. Data validity on the I²C Bus
Figure 6. Timing diagram on I²C Bus