UM2206
Electrical schematics
UM2206 Rev 3
49/55
Figur
e 25. STM3
2 power SMPS
78
STM3
2
P
o
w
er
SMP
S
Title
:
Size:
Reference:
Sheet:
o
f
A3
Revi
si
o
n
:
Proj
ect:
N
U
C
LEO64
ext-SMP
S
MB13
1
9
C0
1
0
5
-Janu
ary-20
1
8
L412R
B
_
P
D
ate:
-
V
ariant
:
SMPS_V1
SMPS_EN
SMPS_PG
SMPS_SW
VOUTVDD
U
1
3
A
N
D
U
1
4
A
R
E E
X
CLU
SIVE
L
Y
POPUL
A
T
E
D
VDD
VDD_1V2
VDD
VDD_M
C
U
SB76
SB79
DNF
SB80
SB87
SB89
SB92
SB93
SB29
SB86
DNF
SB95
SB83
DNF
SB90
DNF
SB91
DNF
SB94
DNF
SB82
DNF
SB81
DNF
0R
R44
DNF
SB31
DNF
SB46
SB39
SB30
SB51
DNF
10uF
C49
10uF
C51
100nF
C50
ST1
PS01
E
JR
EN
B2
SW
C3
VI
N
A3
PG
E1
VOUT
E3
D1
A1
D0
C1
GND
D2
U14
DNF
VDD_
SMPS_1
V
8
ADP
5
301AC
B
Z
-2
-R
7
EN
A3
SW
A1
PVIN
A2
PGN
D
B1
FB
C2
VI
D
C3
SYN
C/MOD
E
B3
VOUTOK
C1
AGND
B2
U13
SMPS_P
G
S
T
1
P
S
0
2D1QTR
EN
12
SW
3
VI
N
2
PG
7
VOUT
5
D1
10
D0
9
GND
4
D2
11
CL
8
VOUT2
6
AUX
1
U12
DNF
2.2uH 2.6A 0.100R
L3
2.2uH 2.6A 0.100R
L1
SB42
DNF
V
D
D
_
IN
_
SMPS
VDD_
SMPS_1
V
8
SB88
SMPS_V
1
SMPS_E
N
SMPS_P
G
SMPS_S
W
VOUTVDD
VOUTVDD
VDD
SB76
: D
E
FAU
L
T
: O
PEN
Clo
sed:
w
h
en V
D
D
_
MCU i
s p
rov
id
ed
from U1
3
o
r U1
4
O
p
en:
wh
en VD
D
_
MCU i
s
p
rov
id
ed from VD
D
o
r CN1
1
VDD_
M
C
U
t
ab
le
VDD_M
C
U
=
V
D
D
VDD_M
C
U
=
1
V
8
VDD_M
C
U
=
V
O
UTVDD
JP
7
SB87
Ope
n
Ope
n
Ope
n
[3-2]
Clo
se
d
S
YNC
/M
ODE
t
ab
le
PWM MOD
E
H
Y
STE
RESIS MOD
E
SB79
SB80
C
lose
d
Ope
n
Ope
n
Clo
se
d
U
1
1
A
N
D
U
1
2
A
R
E E
X
CLU
SIVE
L
Y
POPUL
A
T
E
D
V
D
D
_1V
2 tabl
e
SB46
SB51
SB39
Clo
se
d
Ope
n
Ope
n
O
p
en
O
p
en
O
p
en
O
p
en
Clo
se
d
Clo
se
d
Com
m
en
t on
this pa
rt are for Ext 1V
2
SMPS co
n
figu
ration
H
eader 8x
1
2
1
3
4
5
6
7
8
CN1
1
DNF
ST1PS02D
MO
D
E
V DEF
A
ULT
V M
iddle
V HI
G
H
SB91
SB90
SB82
Ope
n
Ope
n
Ope
n
Ope
n
Clo
se
d
C
lose
d
SB94
Ope
n
SB81
Ope
n
C
lose
d
VOUT
1V10
1V15
Ope
n
Clo
se
d
C
lose
d
Clo
se
d
Ope
n
Ope
n
1V20
D0
D1
19K6
R43
1M
R40
DNF
10uF
C44
10uF
C37
100nF
C43
PA[0..15
]
PA[0..15
]
PA4
PA5
PA6
PA7
SB85
DNF
SB84
SMPS_S
W
VOUTCORE
VOUTC
O
R
E
10uF
C42
DNF
VDD_
SMPS_1
V
2
SB43
DNF
VDD_
SMPS_1
V
2
SB43
Clo
se
d
O
p
en
O
p
en
O
p
en
Ope
n
Ope
n
Ope
n
330R
R38
N
RST
3M
3
R37
HW8
JP
8
VDD_I
N
_
SMPS
VDD_1V2_S
W
VOUT2
VOUTC
O
R
E
H
eader 3x
1
2
1
3
JP
7
HW7
[1-2]
TS
3
A
44159P
W
R
COM1
14
COM2
2
IN1
-2
16
COM3
6
COM4
10
NC
1
15
NO1
13
NC
2
3
NO2
1
NC
3
7
NO3
5
NC
4
11
NO4
9
VC
C
12
GND
4
IN3
-4
8
U10
D
efaul
t
JP
7[1
-2
]:
N
O
SMPS SEL
E
CTI
O
N
,
V
D
D
= VD
D
_
MCU
JP7[3
-2
]: SMPS SEL
E
CTI
O
N
,
V
D
D
_
MCU = 1V
8
E
X
T
E
RNA
L
SMPS SEL
E
CTI
O
N
:
V
D
D
_
MCU = FROM CN1
1
D
efaul
t:
J
P7[1-2]
JP
8 s
electi
o
n
: D
E
FAU
L
T
: CLO
SED
Clo
sed t
o
s
elect 1
V
2
p
o
w
er
Defaul
t
O
p
en for le
g
ac
y
con
fi
g
u
rati
o
n
Opt0: R
v
id=
1
9
.6K
VOUT=
1
V
8
Opt1: R
v
id=
2
5
.5K
VOUT=
1
V
1
SB83
: DE
FAU
L
T
OPEN
cl
ose
d
: VI
D
S
h
or
t to P
V
IN
:
ADP
5
301 O
p
t1: VOUT=
1
V3
V
D
D
_
1
V
2
from U1
1
o
r U1
2
w
o
S
W
V
D
D
_
1
V
2
from U1
1
o
r U1
2
o
r
CN1
1
+
S
W
V
D
D
_
1
V
2
from U1
2
V
O
U
T
2
V
D
D
_
1
V
2
from
CN1
1
V
O
U
T
CORE w
o
S
W
SB30
: D
E
FAU
L
T
CLO
SED
C
lo
se
d
:I
f
A
D
I5
301 is use
d
or
S
T
1P
S
0
2 VOUT is use
d
O
p
en:
If ST1
PS02
V
OUT2 is use
d
, o
r E
x
t
SMPS on
CN1
1
SB31
: D
E
FAU
L
T
O
PEN
O
p
en:
wh
en
SB30
is
clo
sed
Clo
sed:
If us
in
g
E
x
ternal
SMPS on
CN1
1
and
U
8
i
s
n
eeded
E
X
T
E
RNA
L
SMPS SEL
E
CTI
O
N
V
O
U
T
CORE FROM CN1
1
D
efaul
t
E
X
T
E
RNA
L
SMPS SEL
E
CTION
FROM CN1
1
EN
A3
SW
A1
PVIN
A2
PGN
D
B1
FB
C2
VI
D
C3
SYN
C/MOD
E
B3
VOUTOK
C1
AGND
B2
ADP
5
301AC
B
Z
-3
-R
7
U11
25K5
R39
SB96
DNF
SB97
DNF
SB96
SB97
D2
V
D
D
_MCU_SELECTION
SMPS
SELECTION
,
V
D
D
_1V2
Clo
se
d
Ope
n
00
0
Ope
n
Clo
se
d
Ope
n
Clo
se
d
0
0
10
01
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