
Test modes
UM1585
Doc ID 023872 Rev 1
11 Test
modes
At reset, the SPEAr device can be configured in different modes through SW5.
In EXPI mode, the PL_GPIO0 ... 100 pins are mapped to the internal bus signals.
Boot from external serial NAND Flash (FSMC). If the
code is invalid, boot from USB is forced.
0
0
1
0
Boot from external serial NOR Flash (FSMC). If the
code is invalid, boot from USB is forced.
0
0
1
1
Boot from I2C (device address). If the code is invalid,
boot from USB is forced.
0
1
0
0
Boot from UART
(115 baud, no parity, 8 data bits, 1 stop bit)
Note: Not available on engineering sample devices
(ES marking)
0
1
0
1
Boot from PCIe device
0
1
1
0
Reserved
0
1
1
1
Boot from USB device. (VID PID)
1
0
0
0
Table 20.
Software boot options (continued)
Boot Type
SW3-4
GPIO_A3
SW3-3
GPIO_A2
SW3-2
GPIO_A1
SW3-1
GPIO_A0
Table 21.
Test modes
Boot Type
SW5-4
TEST3
SW5-3
TEST2
SW5-2
TEST1
SW5-1
TEST0
Functional: normal mode
0
0
0
0
CPU JTAG debug
0
0
0
1
CPU Trace 16 bits
0
0
1
0
CPU Trace 32 bits
0
0
1
1
EXPI mode
0
1
0
0
EXPI and CPU JTAG debug
0
1
0
1
EXPI and CPU Trace 16 bits
0
1
1
0
EXPI and CPU Trace 32 bits
0
1
1
1
Reserved configurations
1
x
x
x