MLS/160A – System Reference
D o c u m e n t R e v i s i o n 1 . 1
7
3
INTERFACES
3.1
JTAG/Debug – J1
Pin
Name
Function
1
VCC3
3.3 VDC
2
GND
Ground
3
NTRST#
Test Reset
4
BOOT0
Boot0 Pin (please refer to STM32 datasheet)
5
TDI
Test Data In
6
TXD1
Debug Port TXD1 Pin
7
TMS
Test Mode Select
8
RXD1
Debug Port RXD1 Pin
9
TCK
Test Clock
10
GND
Ground
11
---
Reserved. Do not use.
12
---
Reserved. Do not use.
13
TDO
Test Data Out
14
---
Reserved. Do not use.
15
NRESET#
Reset
16
---
Reserved. Do not use.
17
GND
Ground
18
---
Reserved. Do not use.
Table 3:
Pinout JTAG/Debug connector