Spectrum Digital, Inc
2-15
2.1.1.2.20 Imager Multiplexer Mapping
The CPLD GPIO functions are incorporated via CPLD control registers mapping
selected CPLD/imager pins to DM368 GPIO. Each CPLD mapping function consists of
1 bit Direction control and 2 bits of multiplexer control. Most multiplexing has only 1 or
2 options, but the 2 bits in the multiplexing control were used to allow expansion of
options for later revisions.
Note that many of the I/O bits are shared with other On board functions and are
selected in interface groups via the CBT control bits in CPLD Register 3.
Imager IO Dir Control selects direction for CPLD pin mapping to imager connection
mapping. The definition of Input is Input to CPLD therefore output from connector, the
definition of output is output from CPLD therefore input to the connector. All DM368 I/O
bits that are mapped by the multiplexer must be mapped to match the Imager IO
Direction Control. That is if the CPLD is selected as an input the corresponding
mapping pin selected on the DM368 should be selected as an input.
Содержание TMS320DM368
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Страница 89: ...A 1 Appendix A Schematics This appendix contains the schematics for the DM368 EVM ...
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Страница 146: ...Printed in U S A March 2011 514565 0001 Rev B ...