AppBox C21 System User’s Guide 20
AppBox
The table below describes the jumpers on the AppBox C21 CPU Board.
JUMPER
NAME
POSITION DESCRIPTION
FACTORY SHIPPED
POSITION
JP1
Installed = +5 V power to pin 1, EXT1
Installed
JP2
Installed = +5 V power to pin 1, EXT2
Installed
JP3
Installed = +5 V power to pin 1, EXT3
Installed
JP4
Installed = connects PA04_WP to Pin 7, U2, WP3
EEPROM write protect enable
Open – see warning 1
JP5
Installed = connects VDD_3V3 to
PA05_WAKE/FAULT, and Pin3, U5
LIN WAKE/FAULT enable
Installed
JP6
Installed = connects DGND to Pin 7, U2, WP3
EEPROM write protect disable
Installed – see warning 1
JP7
Installed = connect VDD_5V to Pin 1, J2,
+5 volt output
Open
JP8
Installed = connects PA14_XIN to PA14_PWM(P)
XTAL/PWM option
Installed
JP9
Installed = connects PA15_XOUT to
PA14_PWM(N), XTAL/PWM option
Installed
WARNING 1 !
Jumpers JP4 and JP6 are used in the same circuit. Only 1
should be installed. If both are installed the circuit could be
damaged.
!
