Data Logging Connections
Along with the Qwiic connector mentioned in the Common Components, the Data Logging Carrier Board breaks
out several other pins to connect UART, SPI and other I/O devices. The primary SPI pins are netted to the µSD
slot and a PTH header near the LiPo battery connector. A second Chip Select pin tied to G0 is broken out to that
same header.
Note:
µSD Chip Select is tied to the SPI_CS chip select pin on the M.2 Connector. Refer to your Processor
Board's documentation for information on how to properly define that pin in your code.
A UART PTH header connects to RX1 and TX1 for serial data logging and A0, A1, PWM0, PWM1, D0 and D1 are
routed to dedicated PTH pins as well. Lastly, if users prefer a soldered connection instead of Qwiic, the primary I C
bus is broken out to PTH pins.
JTAG
An unpopulated JTAG footprint is available for more advanced users who need breakpoint level debugging. We
recommend checking out our JTAG section for the compatible male header and a compatible JTAG programmer
and debugger.
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