BIOS Setup Utility
SY-P4VSA
66
DRAM Clock/Drive Control
Setting
Description
Note
DRAM Clock
100
133
This item allows you to
control the DRAM speed.
DRAM Timing
By SPD
Manual
If enable the DRAM will auto
detect the DRAM timing.
Default
SDRAM Cycle
3
Default
Length
2
When synchronous DRAM is
installed, the number of clock
cycles of CAS latency
depends on the DRAM
timing. Do not reset this field
from the default value
specified by the system
designer.
Disabled
Default
Bank Interleave
2 Bank
4 Bank
Increase DRAM performance.
2T
Precharge to
Active(Trp)
3T
Increase DRAM performance.
Default
6T
Default
Active to
Precharge
5T
Increase DRAM performance.
3T
Default
Active to
CMD(Trcd)
2T
Increase DRAM performance.
4
Default
DRAM Burst Len
8
Increase DRAM performance.
1T Command
DRAM Command
Rate
2T Command
Increase DRAM performance.
Default