BIOS Setup Utility
SY-7VCM
66
After you have completed the changes, press [Esc] and follow the
instructions on your screen to save your settings or exit without saving.
The following table describes each field in the Advanced Chipset Features
Menu and how to configure each parameter.
3-4.1 CHIPSET FEATURES SETUP
CHIPSET
FEATURES
Setting
Description
Note
SDRAM
10ns
Default
Bank 0,1
DRAM
Timing
SDRAM 8ns
Normal
Medium
Fast
Turbo
This item allows you to select the
value in this field, depending on
whether the board has paged
DRAMs or EDO (extended data
output) DRAMs.
SDRAM Cycle
Length
3
2
When synchronous DRAM is
installed, the number of clock
cycles of CAS latency depends on
the DRAM timing. Do not reset
this field from the default value
specified by the system designer.
Default
Host Clock
Default
DRAM Clock
HCLK+33M
HCLK-33M
This item allows you to control the
DRAM speed.
Disabled
Default
Memory Hole
Enabled
Some interface cards will map
their ROM address to this area. If
this occurs, select [Enabled] in this
field.
Disabled
P2C/C2P
Concurrency
Enabled
This item allows you to
enable/disable the PCI to CPU,
CPU to PCI concurrency
Default
Disabled
Default
Fast R-W
Turn Around
Enabled
This item controls the DRAM
timing. It allows you to enable/
disable the fast read/write turn
around.
Содержание SY-7VCM
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