Sony XA-V7W, Руководство по обслуживанию

Страница: 60 / 80

60
XAV-7W
Pin No. Pin Name I/O Description
38 PDP O Phase comparation output terminal
39 GND — Ground terminal
40 MON O Test setting output terminal Not used
41, 42 GND — Ground terminal
43 OSCO O Clock oscillator circuit output terminal
44 OSCI O Clock oscillator circuit input terminal
45 VDD — Power supply terminal (+5V)
46 GND — Ground terminal
47 CLD O Source driver clock signal output to the liquid crystal display
48 TST1 I Test setting input terminal Fixed at “H” in this set
49 RESH I Horizontal counter reset signal input terminal Not used
50 RESV I Vertical counter reset signal input terminal Not used
51 TST2 I Test setting input terminal Fixed at “H” in this set
52 TEST I Test setting input terminal Fixed at “H” in this set
53 to 56 MON A to MON D O Test setting output terminal Not used
57 CLS O Gate driver clock signal output to the liquid crystal display
58 SPS O Gate driver reset signal output to the liquid crystal display
59 VR I Gate driver scanning input from the liquid crystal display
60 MOD1 O Gate driver control signal output to the liquid crystal display
61 TEST I Test setting input terminal Fixed at “L” in this set
62, 63 GND — Ground terminal
64 GPS O Gate power supply signal output terminal Not used
65 LOWI I Gate driver control signal input terminal Not used
66 ABC I
Output setting input terminal
“L”: VSWO (pin
wh ), GPS (pin yf ), SYNO (pin us ) are “L” output mode
“H”: VSWO (pin
wh
), GPS (pin
yf
), SYNO (pin
us
) are normal output mode
Fixed at “L” in this set
67 VDD — Power supply terminal (+5V)
68 GND — Ground terminal
69 DVTC I Test setting input terminal Fixed at “H” in this set
70 BLKI I Double-sided position adjustment signal input terminal
71 BLKO O Double-sided position adjustment signal output terminal
72 SYNO O Composite sync signal output terminal Not used